LSI53CF92A LSI, LSI53CF92A Datasheet - Page 91

• Manufacturer Part Number: LSI53CF92A
• Manufacturer: LSI

Specifications of LSI53CF92A

• Lead Free Status / RoHS Status: Not Compliant

Register: 0x0B
SCSI Bus Control Lines (SBCL)
Read Only
Register Bank 1
This read only register provides status of the SCSI bus control signals.
These bits are sampled; they are a representation of what was on the
SCSI bus one synchronization delay prior to the time this register is read.
REQ
ACK
BSY
SEL
ATN
MSG
C/D
I/O
SCAM Register Set
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
REQ
7
0
ACK
6
0
(Bit Set = SCSI REQ/ Asserted)
(Bit Set = SCSI ACK/ Asserted)
(Bit Set = SCSI BSY/ Asserted)
(Bit Set = SCSI SEL/ Asserted)
(Bit Set = SCSI ATN/ Asserted)
(Bit Set = SCSI MSG/ Asserted)
(Bit Set = SCSI C/D/ Asserted)
(Bit Set = SCSI I/O/ Asserted)
BSY
5
0
SEL
4
0
Default
ATN
3
0
MSG
2
0
C/D
1
0
I/O
0
0
4-41
7
6
5
4
3
2
1
0