M41ST87WMX6 STMicroelectronics, M41ST87WMX6 Datasheet - Page 35

• Manufacturer Part Number: M41ST87WMX6
• Description: IC SUPERVISOR RTC 160X8 28-SOIC
• Manufacturer: STMicroelectronics
• Type: Clock/Calendar/Supervisorr

Specifications of M41ST87WMX6

• Memory Size: 160B
• Time Format: HH:MM:SS:hh (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC, 28-SOH (8.48mm Width)
• Function: Clock/Calendar/Alarm/Timer Interrupt
• Rtc Memory Size: 160 Byte
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (2-Wire, I2C)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-5370-5; M41ST87WMX6

M41ST87Y, M41ST87W
Figure 25. Backup mode alarm waveform
3.4
Note:
Note:
V CC
V PFD
V SO
ABE, AFE Bits in Interrupt Register
AF bit in Flags Register
IRQ/OUT
Watchdog timer
The watchdog timer can be used to detect an out-of-control microprocessor. The user
programs the watchdog timer by setting the desired amount of time-out into the watchdog
register, address 09h. Bits BMB4-BMB0 store a binary multiplier and the two lower order bits
RB1-RB0 select the resolution, where 00=1/16 second, 01=1/4 second, 10=1 second, and
11=4 seconds. The amount of time-out is then determined to be the multiplication of the five-
bit multiplier value with the resolution. (For example: writing 00001110 in the watchdog
register = 3*1 or 3 seconds).
The accuracy of the timer is within ± the selected resolution.
If the processor does not reset the timer within the specified period, the M41ST87Y/W sets
the WDF (watchdog flag) and generates either a watchdog interrupt or a microprocessor
reset.
The most significant bit of the watchdog register is the watchdog steering bit (WDS). When
set to a '0,' the watchdog will activate the IRQ/OUT pin when timed-out. When WDS is set to
a '1,' the watchdog will output a negative pulse on the RST pin for t
register, FT, AFE, ABE and SQWE bits will reset to a '0' at the end of a watchdog time-out
when the WDS bit is set to a '1.'
The watchdog timer can be reset by two methods: 1) a transition (high-to-low or low-to-high)
can be applied to the watchdog input pin (WDI) or 2) the microprocessor can perform a
WRITE of the watchdog register. The time-out period then starts over.
The WDI pin should be tied to V
package.
In order to perform a software reset of the watchdog timer, the original time-out period can
be written into the watchdog register, effectively restarting the count-down cycle.
HIGH-Z
Doc ID 9497 Rev 9
SS
if not used and is only available in the SOX28 (MX)
rec
t rec
. The watchdog
HIGH-Z
Clock operation
AI07087
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