GS8161Z36BGD-250 GSI TECHNOLOGY, GS8161Z36BGD-250 Datasheet - Page 9

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GS8161Z36BGD-250

Manufacturer Part Number
GS8161Z36BGD-250
Description
Manufacturer
GSI TECHNOLOGY
Datasheet

Specifications of GS8161Z36BGD-250

Density
18Mb
Access Time (max)
5.5ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
181MHz
Operating Supply Voltage (typ)
2.5/3.3V
Address Bus
19b
Package Type
FBGA
Operating Temp Range
0C to 70C
Number Of Ports
4
Supply Current
235mA
Operating Supply Voltage (min)
2.3/3V
Operating Supply Voltage (max)
2.7/3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
165
Word Size
36b
Number Of Words
512K
Lead Free Status / Rohs Status
Compliant
Rev: 1.05a 10/2009
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS8161Z18/32/36BD 165-Bump BGA Pin Description
B
A
Symbol
, B
A
V
MCH
CKE
ADV
TMS
TDO
DQ
DQ
DQ
DQ
LBO
TCK
V
TDI
V
B
0
NC
CK
ZZ
FT
E
E
E
DDQ
W
G
A
, B
, A
DD
SS
1
3
2
A
B
C
D
1
C
, B
D
Type
I/O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Byte Write Enable for DQ
9/38
Address field LSBs and Address Counter Preset Inputs
GS8161Z18B(T/D)/GS8161Z32B(D)/GS8161Z36B(T/D)
Burst address counter advance enable; active high
Flow Through or Pipeline mode; active low
Clock Input Buffer Enable; active low
Linear Burst Order mode; active low
Sleep mode control; active high
Clock Input Signal; active high
Data Input and Output pins
Output driver power supply
Output Enable; active low
Chip Enable; active high
Write Enable; active low
Chip Enable; active low
Chip Enable; active low
Scan Test Mode Select
I/O and Core Ground
Scan Test Data Out
Must Connect High
Core power supply
Scan Test Data In
Scan Test Clock
Address Inputs
Description
No Connect
A
, DQ
B
, DQ
C
, DQ
D
I/Os; active low
© 2004, GSI Technology

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