EP2SGX60EF1152C3N Altera, EP2SGX60EF1152C3N Datasheet - Page 86

IC STRATIX II GX 60K 1152-FBGA

EP2SGX60EF1152C3N

Manufacturer Part Number
EP2SGX60EF1152C3N
Description
IC STRATIX II GX 60K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet

Specifications of EP2SGX60EF1152C3N

Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
534
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2181

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TriMatrix Memory
Figure 2–55. M-RAM Block LAB Row Interface
Note to
(1)
2–78
Stratix II GX Device Handbook, Volume 1
Only R24 and C16 interconnects cross the M-RAM block boundaries.
Figure
LABs in Row
M-RAM Boundary
2–55:
Row Unit Interface Allows LAB
Rows to Drive Port A Datain,
Dataout, Address and Control
Signals to and from M-RAM Block
LAB Interface
Blocks
L0
L1
L2
L3
L4
L5
Port A
Note (1)
M-RAM Block
Row Unit Interface Allows LAB
Rows to Drive Port B Datain,
Dataout, Address and Control
Signals to and from M-RAM Block
Port B
R0
R1
R2
R3
R4
R5
LABs in Row
M-RAM Boundary
Altera Corporation
October 2007

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