20-668-0011 Rabbit Semiconductor, 20-668-0011 Datasheet - Page 57
20-668-0011
Manufacturer Part Number
20-668-0011
Description
IC MPU RABIT3000A 55.5MHZ128LQFP
Manufacturer
Rabbit Semiconductor
Datasheet
1.20-668-0011.pdf
(312 pages)
Specifications of 20-668-0011
Processor Type
Rabbit 3000 8-Bit
Speed
55.5MHz
Voltage
2.5V, 2.7V, 3V, 3.3V
Mounting Type
Surface Mount
Package / Case
128-LQFP
Data Bus Width
8 bit
Maximum Clock Frequency
55.5 MHz
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Number Of Programmable I/os
56
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
316-1061
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Part Number:
20-668-0011
Manufacturer:
Rabbit Semiconductor
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5.3.5 Stack Protection (Rabbit 3000A)
The ability to detect stack overflow and underflow was added starting with the Rabbit
3000A. Low and high stack limits can be set on 256-byte boundaries. When a stack-
relative memory access occurs within 16 bytes of these limits (or outside of them), a new
Priority 3 stack violation interrupt occurs. The 16-byte buffer exists to allow stack protec-
tion even if the stack is placed against a memory segment boundary.
Figure 5-6 shows one possible stack layout. A 2048-byte stack is set up by setting
STKHLR to 0x00E0, STKLLR to 0x00D8, and SP to 0xDFF0. Any stack-relative mem-
ory accesses above 0xDFEF (i.e., stack underflow) or below 0xD810 (i.e., overflow)
would trigger the stack violation interrupt.
Figure 5-6. Simple Stack Protection Layout
5.3.6 RAM Segment Relocation (Rabbit 3000A)
Normally when instruction/data separation is enabled, instructions are stored in flash
memory and data are stored in RAM memory. This can present a problem for the Interrupt
Service Routine area, which often requires run-time modification. The RAM Segment
Register (RAMSR) allows a 1, 2, or 4 KB segment of the logical memory space to be
mapped as data would be mapped, even for program execution.
Chapter 5 Memory Management
47
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