SPC5200CBV400B Freescale Semiconductor, SPC5200CBV400B Datasheet - Page 16

• Manufacturer Part Number: SPC5200CBV400B
• Description: IC MPU 32BIT 500MHZ 272PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC603er

Specifications of SPC5200CBV400B

• Processor Type: MPC52xx PowerPC 32-Bit
• Speed: 400MHz
• Voltage: 1.5V
• Mounting Type: Surface Mount
• Package / Case: 272-PBGA
• Core Size: 32 Bit
• Program Memory Size: 32KB
• Cpu Speed: 400MHz
• Embedded Interface Type: I2C, SPI, USB
• Digital Ic Case Style: BGA
• No. Of Pins: 272
• Rohs Compliant: No
• Family Name: MPC52xx
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.58V
• Operating Supply Voltage (min): 1.42V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 272
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

Due to synchronization, prioritization, and mapping of external interrupt sources, the propagation of external interrupts to the
core processor is delayed by several IP_CLK clock cycles. The following table specifies the interrupt latencies in IP_CLK
cycles. The IP_CLK frequency is programmable in the Clock Distribution Module (see
NOTES:
1) The frequency of IP_CLK depends on register settings in Clock Distribution Module. See the MPC5200B User’s Manual.
16
Standard GPIO Interrupts
GPIO WakeUp Interrupts
IRQ0
8 GPIOs
8 GPIOs
IRQ1
IRQ2
IRQ3
Interrupt Requests
Interrupt Type
8
8
Notes:
1. PIs = Programmable Inputs
2. Grouper and Encoder functions imply programmability in software
GPIO WakeUp
GPIO Std
GPIO_PSC3_4
GPIO_PSC3_5
GPIO_PSC3_8
GPIO_PSC1_4
GPIO_PSC2_4
GPIO_PSC3_9
GPIO_ETHI_4
GPIO_ETHI_5
GPIO_ETHI_6
GPIO_ETHI_7
GPIO_ETHI_8
GPIO_IRDA_0
GPIO_USB_9
Pin Name
DGP_IN0
DGP_IN1
IRQ0
IRQ0
IRQ1
IRQ2
IRQ3
Table 16. External Interrupt Latencies
Figure 4. External Interrupt Scheme
MPC5200B Data Sheet, Rev. 4
Clock Cycles
12
10
10
10
10
10
12
12
12
12
12
12
12
12
12
12
12
12
12
12
cint
int
PIs
Main Interrupt
Controller
Reference Clock
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
IP_CLK
Grouper
Encoder
Encoder
Table
16).
Core Interrupt
critical (cint)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
normal (int)
Freescale Semiconductor
CORE_CINT
CORE_INT
e300 Core
SpecID
A4.10
A4.11
A4.12
A4.13
A4.15
A4.16
A4.17
A4.18
A4.19
A4.20
A4.21
A4.1
A4.6
A4.2
A4.3
A4.4
A4.5
A4.7
A4.8
A4.9