MC68EC040FE25A Freescale Semiconductor, MC68EC040FE25A Datasheet - Page 5

• Manufacturer Part Number: MC68EC040FE25A
• Description: IC MPU 32BIT 25MHZ 184-CQFP
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68EC040FE25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 184-CQFP
• Core Size: 32bit
• Program Memory Size: 8KB
• Cpu Speed: 25MHz
• Digital Ic Case Style: CQFP
• No. Of Pins: 184
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 184
• Package Type: CQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Paragraph
3.1
3.1.1
3.1.2
3.1.3
3.1.4
3.2
3.2.1
3.2.2
3.2.2.1
3.2.2.2
3.2.2.3
3.2.3
3.2.4
3.2.4.1
3.2.4.2
3.2.4.3
3.2.4.4
3.2.5
3.2.6
3.2.6.1
3.2.6.2
3.2.6.3
3.3
3.4
3.5
3.6
3.6.1
3.6.2
3.7
3.7.1
3.7.2
3.7.3
3.7.4
MOTOROLA
Number
Logical Address Translation .................................................................. 3-7
Address Translation Caches ................................................................. 3-26
Transparent Translation ........................................................................ 3-29
Address Translation Summary .............................................................. 3-30
MMU Effect on RSTI and MDIS ............................................................. 3-31
MMU Instructions .................................................................................. 3-33
Memory Management Programming Model .......................................... 3-3
User and Supervisor Root Pointer Registers..................................... 3-3
Translation Control Register .............................................................. 3-4
Transparent Translation Registers .................................................... 3-5
MMU Status Register ........................................................................ 3-6
Translation Tables ............................................................................. 3-7
Descriptors ........................................................................................ 3-12
Translation Table Example ................................................................ 3-16
Variations in Translation Table Structure .......................................... 3-16
Table Search Accesses ..................................................................... 3-21
Address Translation Protection ......................................................... 3-23
Effect of RSTI on the MMUs .............................................................. 3-31
Effect of MDIS on Address Translation .............................................. 3-31
MOVEC ............................................................................................. 3-33
PFLUSH............................................................................................. 3-33
PTEST ............................................................................................... 3-33
Register Programming Considerations.............................................. 3-34
TABLE OF CONTENTS (Continued)
Table Descriptors ........................................................................... 3-12
Page Descriptors ........................................................................... 3-13
Descriptor Field Definitions ............................................................ 3-13
Indirect Action ................................................................................ 3-16
Table Sharing Between Tasks ....................................................... 3-18
Table Paging .................................................................................. 3-19
Dynamically Allocated Tables ........................................................ 3-21
Supervisor and User Translation Tables........................................ 3-23
Supervisor Only.............................................................................. 3-23
Write Protect .................................................................................. 3-24
Freescale Semiconductor, Inc.
(Except MC68EC040 and MC68EC040V)
For More Information On This Product,
Memory Management Unit
Go to: www.freescale.com
M68040 USER’S MANUAL
Section 3
Title
Number
Page
vii