MC68030RC50C Freescale Semiconductor, MC68030RC50C Datasheet - Page 442

• Manufacturer Part Number: MC68030RC50C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC50C

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

10.4.17 Transfer Status Register and ScanPC Primitive
MOTOROLA
tional basis, the scanPC also makes transfers. This primitive applies to general
category instructions. If the coprocessor issues this primitive during the ex-
the transfer status register and scanPC primitive.
transferred.
between the coprocessor and the main processor status register. On an op-
ecution of a conditional category instruction, the main processor initiates
protocol violation exception processing. Figure 10-39 shows the format of
This primitive uses the CA, PC, and DR bits as previously described.
to the operand CIR. If SP=O and D R = l , the main processor reads a 16-bit
value from the operand CIR into the main processor status register.
value to the operand CIR. If SP= 1 and DR= 1, the main processor reads a
With this primitive, a general category instruction can change the main pro-
scanPC, or new values in both the status register and the scanPC. By ac-
the main processor condition codes, supervisor status, trace modes, selection
Both the transfer status register and the scanPC primitive transfers values
Bit [8], the SP bit, selects the scanPC option. If SP = 1, the primitive transfers
both the scanPC and status register. If SP=O, only the status register is
If SP = 0 and DR = O, the main processor writes the 16-bit status register value
If S P = I and DR=O, the main processor writes the long-word value in the
scanPC to the instruction address CIR and then writes the status register
16-bit value from the operand CIR into the status register and then reads a
long-word value from the instruction address CIR into the scanPC.
cessor program flow by placing a new value in the status register, in the
cessing the status register, the coprocessor can determine and manipulate
of the active stack, and interrupt mask level.
CA
15
Figure 10-39. T r a n s f e r S t a t u s Register a n d S c a n P C P r i m i t i v e F o r m a t
PC
14
DR
13
12
0
11
0
MC68030 USER'S MANUAL
10
0
9
1 SP
8
0
7
0
6
0
5
0
4
0
3
0
2
0
10-55
1
0
0
10