MC68030RC50C Freescale Semiconductor, MC68030RC50C Datasheet - Page 470

• Manufacturer Part Number: MC68030RC50C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC50C

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

MOTOROLA
11.3.2 Overlap and Best Case
two instructions.
timing tables in 11.6 INSTRUCTION TIMING TABLES for head and tail times.
concurrently with the previous instruction. In Figure 11-2, a portion of in-
structions A and B execute simultaneously. The overlap time decreases the
overall execution time for the two instructions. Similarly, an overlap period
overlap the end of the execution time of instruction A. This time period is
called the head of instruction B. The portion of time at the end of instruction
A that can overlap the beginning of instruction B is called the tail of instruction
A. The total overlap time between instructions A and B consists of the lesser
of the tail of instruction A or the head of instruction B. Refer to the instruction
or for an operation (CCop). In Figure 11-12, the best case execution time for
and instruction A overlap so that the head of instruction B is completely
overlapped with the tail of instruction A.
Overlap is the time, measured in clock periods, that an instruction executes
between instructions B and C reduces the overall execution time of these
Each instruction contributes to the total overlap time. As shown in Figure
11-2, a portion of time at the beginning of the execution of instruction B can
Figure 11-3 shows the timing relationship of the factors that comprise the
instruction-cache case time for either an effective address calculation (CCea)
instruction B occurs when the instruction-cache-case times for instruction B
F . . . .
Figure 11-2. Simultaneous Instruction Execution
INSTRUCTION
A
MC68030 USER'S MANUAL
F . . . .
OVERLAP
]
I
I N STRUCTI O N B
t
l _ _ J
OVERLAP
T
I
INSTRUCTION C
I
11-7
11