PSB2115HV1.2 Lantiq, PSB2115HV1.2 Datasheet - Page 143

• Manufacturer Part Number: PSB2115HV1.2
• Manufacturer: Lantiq

Specifications of PSB2115HV1.2

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Semiconductor Group
2.8
2.8.1
The AUX interface provides for various functions, which depend on the operation mode
(TE, LT-T or LT-S mode) selected by pins MODE0 and MODE1/EAW (see table 15).
After reset all pins except DRQTA and DRQRA (pins AUX0 and AUX1 in TE mode) are
switched as inputs until further configuration is done by the host.
Table 15 AUX Pin Functions
AUX2-5 (TE mode), AUX3-5 (LT modes)
These pins can be used as programmable I/O lines. In LT modes this function is
multiplexed with the PCM interface, i.e. the host can select either PCM functionality
(PCFG:PLD=0) or standard I/O characteristic on AUX3-5 (PCFG:PLD=1).
As inputs (AOE:OEx=1) the state at the pin is latched in when the host performes read
operation to register ARX. A certain setup and hold time must be ensured for proper
operation (see figure 69).
As outputs (AOE:OEx=0) the value in register ATX is driven on the pins with a minimum
delay after the write operation to this register is performed. They can be configured as
open drain (ACFG:ODx=0) or push/pull outputs (ACFG:ODx=1). The status (’1’ or ’0’) at
output pins can be read back from register ARX, which may be different from the ATX
value, e.g. if another device drives a different level.
AUX2 / INT (TE mode, output)
If configured as output, pin AUX2 provides the high active interrupt output signal. If
configured as input it can be used as a general purpose input pin as described above
(also see chapter 2.6.4).
AUX0
AUX1
AUX2
AUX3
AUX4
AUX5
AUX6
AUX7
Pin
Auxiliary Interface
Mode Dependent Functions
AUX4
INT0
TE mode
DRQTA
DRQRA
AUX2 / INT
AUX3
AUX5
INT1
CH0
CH1
AUX3 / FBOUT
AUX4 / PCMIN
AUX5 / PCMOUT
INT0
INT1 / SGOUT
LT-T mode
CH2
143
Functional Description
AUX4 / PCMIN
LT-S mode
CH0
CH1
CH2
AUX3 / FBOUT
AUX5 / PCMOUT
INT0
INT1
PSB 2115
PSF 2115
11.97