PSB2115HV1.2 Lantiq, PSB2115HV1.2 Datasheet - Page 205

• Manufacturer Part Number: PSB2115HV1.2
• Manufacturer: Lantiq

Specifications of PSB2115HV1.2

• Lead Free Status / Rohs Status: Supplier Unconfirmed

PSB 2115
PSF 2115
Operational Description
3.6.4.4
States LT-S Mode
G1 deactivated
The IPAC is not transmitting. There is no signal detected on the S/T-interface, and no
activation command is received in the C/I channel.
G2 pending activation
As a result of an INFO 0 detected on the S/T line or an ARD command, the IPAC begins
transmitting INFO 2 and waits for reception of INFO 3. The timer to supervise reception
of INFO 3 is to be implemented in software. In case of an ARL command, loop 2 is
closed.
G3 activated
Normal state where INFO 4 is transmitted to the S/T-interface. The IPAC remains in this
state as long as neither a deactivation nor a test mode is requested, nor the receiver
loses synchronism.
When receiver synchronism is lost, INFO 2 is sent automatically. After reception of
INFO 3, the transmitter keeps on sending INFO 4.
G2 lost framing
This state is reached when the IPAC has lost synchronism in the state G3 activated.
G4 pending deactivation
This state is triggered by a deactivation request DR. It is an unstable state: indication DI
(state “G4 wait for DR.”) is issued by the IPAC when:
either INFO0 is received,
or an internal timer of 32 ms expires.
G4 wait for DR
Final state after a deactivation request. The IPAC remains in this state until a response
to DI (in other words DC) is issued.
Test mode 1
Single alternating pulses are sent on the S/T-interface (2-kHz repetition rate).
Test mode 2
Continuous alternating pulses are sent on the S/T-interface (96 kHz).
Semiconductor Group
205
11.97