AM79C973BKC AMD (ADVANCED MICRO DEVICES), AM79C973BKC Datasheet - Page 102

no-image

AM79C973BKC

Manufacturer Part Number
AM79C973BKC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AM79C973BKC

Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AM79C973BKC
Manufacturer:
AMD
Quantity:
120
Part Number:
AM79C973BKC
Manufacturer:
AMD
Quantity:
1 000
Part Number:
AM79C973BKC
Manufacturer:
AMD
Quantity:
1 000
Part Number:
AM79C973BKC
Manufacturer:
AMD
Quantity:
1 000
Part Number:
AM79C973BKCW
Manufacturer:
AMD
Quantity:
2 144
Part Number:
AM79C973BKCW
Manufacturer:
AMD
Quantity:
1 000
The LED pins can be configured to operate in either
open-drain mode (active low) or in totem-pole mode
(active high). The output can be stretched to allow the
human eye to recognize even short events that last only
several microseconds. After H_RESET, the four LED
outputs are configured as shown in Table 15.
For each LED register, each of the status signals is
AND’d with its enable signal, and these signals are all
OR’d together to form a combined status signal. Each
LED pin combined status signal can be programmed to
run to a pulse stretcher, which consists of a 3-bit shift
register clocked at 38 Hz (26 ms). The data input of
each shift register is normally at logic 0. The OR gate
output for each LED register asynchronously sets all
three bits of its shift register when the output becomes
asserted. The inverted output of each shift register is
used to control an LED pin. Thus, the pulse stretcher
provides 2 to 3 clocks of stretched LED output, or 52
ms to 78 ms. See Figure 48.
Power Savings Mode
Power Management Support
The Am79C973/Am79C975 controller supports power
management as defined in the PCI Bus Power Man-
agement Interface Specification V1.1 and Network De-
v i c e C l a s s Po w e r M a n a g e m e n t R e fe r e n c e
Specification V1.0.These specifications define the net-
work device power states, PCI power management in-
terface including the Capabilities Data Structure and
power management registers block definitions, power
management events, and OnNow network Wake-up
events. In addition, the Am79C973/Am79C975 control-
ler supports legacy power management schemes,
such as Remote Wake-Up (RWU) mode. When the
system is in RWU mode, PCI bus power is on, the PCI
clock may be slowed down or stopped, and the wake-
up output pin may drive the CPU's System Manage-
ment Interrupt (SMI) line.
Auxiliary Power
The Am79C973/Am79C975 uses the AUXDET pin to
detect whether it is powered by an auxiliary power sup-
ply that is always on or by the PCI power supply that
goes down during power saving modes.
102
Output
LED0
LED1
LED2
LED3
LED
Table 15. LED Default Configuration
Link Status
Indication
Transmit
Receive
Status
Status
--
Driver Mode
Open Drain -
Open Drain -
Open Drain -
Open Drain -
Active Low
Active Low
Active Low
Active Low
Pulse Stretch
Enabled
Enabled
Enabled
Enabled
P R E L I M I N A R Y
Am79C973/Am79C975
If bit 15 of PMC is zero, indicating that PME assertion
in D3cold is not supported, the PME_Status and
PME_En bits of the PMCSR register will be reset by a
PCI bus reset (assertion of RST pin). This reset will ac-
tually occur after the EEPROM read following the reset
is complete to allow the controller to be configured.
To fully satisfy the requirements of the PCI power man-
agement specification in an adapter card configuration,
the AUXDET pin should be connected directly to the
auxiliary power supply and also to ground through a re-
sistor. This will sense the presence of the auxiliary
power and correctly report the capability of asserting
PME in D3cold.
For hardwired configurations where auxiliary power is
know to be always available or never available, the
AUXDET input may be disabled by connecting it di-
rectly or through a resistor to VDD. This will allow
BCR36 bit 15 to directly control PMC bit 15.
The general scheme for the Am79C973/Am79C975
power management is that when a PCI Wake-up event
is detected, a signal is generated to cause hardware
external to the Am79C973/Am79C975 device to put
the computer into the working (S0) mode.
The Am79C973/Am79C975 device supports three
types of wake-up events:
1. Magic Packet Detect
2. OnNow Pattern Match Detect
3. Link State Change
Figure 49 shows the relationship between these Wake-
up events and the various outputs used to signal to the
external hardware.
MR_SPEED_SEL
RCVME
FDLSE
LNKSE
RCVM
RCVE
XMTE
MPSE
COLE
LNKS
FDLS
100E
MPS
COL
RCV
XMT
Figure 48. LED Control Logic
21510D-53
Pulse
Stretcher
To

Related parts for AM79C973BKC