AM79C973BKC AMD (ADVANCED MICRO DEVICES), AM79C973BKC Datasheet - Page 221

• Manufacturer Part Number: AM79C973BKC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C973BKC

• Lead Free Status / Rohs Status: Not Compliant

Am79C973/Am79C975 Control and Status Registers (Concluded)
Register
CSR76
CSR78
CSR80
CSR88~89
CSR112
CSR114
CSR116
CSR122
CSR124
CSR125
RCVRL: RCV Descriptor Ring length
XMTRL: XMT Descriptor Ring length
FIFO threshold and DMA burst control (DEFAULT = 2810)
8000
4000
bits [13:12] = RCVFW, Receive FIFO Watermark
bits [9:8] = XMTFW, Transmit FIFO Watermark
bits [7:0] = DMA Burst Register
Chip ID (Contents = v2625003 (for Am79C973); v = Version Number)
Chip ID (Contents = v2627003 (for Am79C975); v = Version Number)
Missed Frame Count
Receive Collision Count
OnNow Miscellaneous
8000
4000
2000
1000
Receive Frame Alignment Control
8000
4000
2000
1000
BMU Test Register (DEFAULT = 0000)
8000
4000
2000
1000
MAC Enhanced Configuration Control (DEFAUT = 603c
bits [15:8] = IPG, InterPacket Gap (Default=60xx, 96 bit times)
bits [8:0] = IFS1, InterFrame Space Part 1 (Default=xx3c, 60 bit times)
bits [11:10] = XMTSP, Transmit Start Point
0000 Request DMA when 16 bytes are present
1000 Request DMA when 64 bytes are present
2000 Request DMA when 112 bytes are present
3000 Reserved
0000 Start transmission after 20/36 (No SRAM/SRAM) bytes have been written
0400 Start transmission after 64 bytes have been written
0800 Start transmission after 128 bytes have been written
0C00 Start transmission after 220 max/Full Packet (No SRAM/SRAM with UFLO bit set) bytes
0000 Start DMA when 16 write cycles can be made
0100 Start DMA when 32 write cycles can be made
0200 Start DMA when 64 write cycles can be made
0300 Start DMA when 128 write cycles can be made
Reserved
Reserved
--
--
--
--
--
--
--
--
--
--
--
--
have been written
0800
0400
0200
0100
0800
0400
0200
0100
0800
0400
0200
0100
P R E L I M I N A R Y
Am79C973/Am79C975
PME_EN_OVR
--
--
LCDET
--
--
--
--
--
--
--
--
Contents
0080
0040
0020
0010
0080
0040
0020
0010
0080
0040
0020
0010
PMAT
EMPPLBA
MPMAT
MPPEN
--
--
--
--
--
--
--
--
0008
0004
0002
0001
0008
0004
0002
0001
0008
0004
0002
0001
RWU_DRIVER
RWU_GATE
RWU_POL
RST_POL
--
--
--
RCVALGN
--
RPA
--
--
221