M29W320DT70N6 STMicroelectronics, M29W320DT70N6 Datasheet - Page 16

• Manufacturer Part Number: M29W320DT70N6
• Description: Flash 4Mx8 or 2Mx16 70ns
• Manufacturer: STMicroelectronics

Specifications of M29W320DT70N6

• Data Bus Width: 8 bit, 16 bit
• Memory Type: NOR Flash
• Memory Size: 32 Mbit
• Architecture: Sectored
• Interface Type: CFI
• Access Time: 70 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 10 mA
• Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSOP-1-48
• Organization: 4 MB x 8
• Lead Free Status / Rohs Status: Details

M29W320DT, M29W320DB
Once the Unlock Bypass command has been is-
sued the memory will only accept the Unlock By-
pass Program command and the Unlock Bypass
Reset command. The memory can be read as if in
Read mode.
The memory offers accelerated program opera-
tions through the V
system asserts V
the memory automatically enters the Unlock By-
pass mode. The system may then write the two-
cycle Unlock Bypass program command se-
quence. The memory uses the higher voltage on
the V
Bypass Program operation.
Never raise V
mode except Read mode, otherwise the memory
may be left in an indeterminate state.
Unlock Bypass Program Command. The
lock Bypass Program command can be used to
program one address in the memory array at a
time. The command requires two Bus Write oper-
ations, the final write operation latches the ad-
dress and data in the internal state machine and
starts the Program/Erase Controller.
The Program operation using the Unlock Bypass
Program command behaves identically to the Pro-
gram operation using the Program command. The
operation cannot be aborted, the Status Register
is read and protected blocks cannot be pro-
grammed. Errors must be reset using the Read/
Reset command, which leaves the device in Un-
lock Bypass Mode. See the Program command for
details on the behavior.
Unlock Bypass Reset Command. The
Bypass Reset command can be used to return to
Read/Reset mode from Unlock Bypass Mode.
Two Bus Write operations are required to issue the
Unlock Bypass Reset command. Read/Reset
command does not exit from Unlock Bypass
Mode.
Chip Erase Command. The Chip Erase com-
mand can be used to erase the entire chip. Six Bus
Write operations are required to issue the Chip
Erase Command and start the Program/Erase
Controller.
If any blocks are protected then these are ignored
and all the other blocks are erased. If all of the
blocks are protected the Chip Erase operation ap-
pears to start but will terminate within about 100µs,
leaving the data unchanged. No error condition is
given when protected blocks are ignored.
During the erase operation the memory will ignore
all commands, including the Erase Suspend com-
mand. It is not possible to issue any command to
abort the operation. Typical chip erase times are
given in Table 5.. All Bus Read operations during
the Chip Erase operation will output the Status
16/46
PP
/Write Protect pin, to accelerate the Unlock
PP
/Write Protect to V
PP
PP
on the V
/Write Protect pin. When the
PP
/Write Protect pin,
PP
from any
Unlock
Un-
Register on the Data Inputs/Outputs. See the sec-
tion on the Status Register for more details.
After the Chip Erase operation has completed the
memory will return to the Read Mode, unless an
error has occurred. When an error occurs the
memory will continue to output the Status Regis-
ter. A Read/Reset command must be issued to re-
set the error condition and return to Read Mode.
The Chip Erase Command sets all of the bits in un-
protected blocks of the memory to ’1’. All previous
data is lost.
Block Erase Command. The Block Erase com-
mand can be used to erase a list of one or more
blocks. Six Bus Write operations are required to
select the first block in the list. Each additional
block in the list can be selected by repeating the
sixth Bus Write operation using the address of the
additional block. The Block Erase operation starts
the Program/Erase Controller about 50µs after the
last Bus Write operation. Once the Program/Erase
Controller starts it is not possible to select any
more blocks. Each additional block must therefore
be selected within 50µs of the last block. The 50µs
timer restarts when an additional block is selected.
The Status Register can be read after the sixth
Bus Write operation. See the Status Register sec-
tion for details on how to identify if the Program/
Erase Controller has started the Block Erase oper-
ation.
If any selected blocks are protected then these are
ignored and all the other selected blocks are
erased. If all of the selected blocks are protected
the Block Erase operation appears to start but will
terminate within about 100µs, leaving the data un-
changed. No error condition is given when protect-
ed blocks are ignored.
During the Block Erase operation the memory will
ignore all commands except the Erase Suspend
command. Typical block erase times are given in
Table 5.. All Bus Read operations during the Block
Erase operation will output the Status Register on
the Data Inputs/Outputs. See the section on the
Status Register for more details.
After the Block Erase operation has completed the
memory will return to the Read Mode, unless an
error has occurred. When an error occurs the
memory will continue to output the Status Regis-
ter. A Read/Reset command must be issued to re-
set the error condition and return to Read mode.
The Block Erase Command sets all of the bits in
the unprotected selected blocks to ’1’. All previous
data in the selected blocks is lost.
Erase Suspend Command. The Erase Suspend
Command may be used to temporarily suspend a
Block Erase operation and return the memory to
Read mode. The command requires one Bus
Write operation.