TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 100

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

7.2
Control
RB000
7.2
Voltage detection control register 1
Voltage detection control register 2
(0x0FC6)
(0x0FC7)
VDCR1
VDCR2
Control
The voltage detection circuit is controlled by voltage detection control registers 1 and 2.
Note 1: VDCR1 is initialized by a power-on reset or an external reset input.
Note 2: When VD2F or VD1F is cleared by the software and is set due to voltage detection at the same time, the setting due to
Note 3: VD2F and VD1F cannot be programmed to "1" by the software.
Note 1: VDCR2 is initialized by a power-on reset or an external reset input.
Note 2: Bits 7 and 6 of VDCR2 are read as "0".
Note 3: Bit 5 and 4 of VDCR2 should be cleared to "0".
VD2MOD
VD1MOD
VD2LVL
VD1LVL
Read/Write
Read/Write
VD2EN
VD1EN
Bit Symbol
VD2SF
VD1SF
Bit Symbol
After reset
voltage detection is given priority.
After reset
VD2F
VD1F
Voltage detection 2 flag (Retains the
state when VDD<VD2LVL is detec-
ted)
Voltage detection 2 status flag (Mag-
nitude relation of VDD and VD2LVL
when they are read)
Selection for detection voltage 2
Voltage detection 1 flag (Retains the
state when VDD < VD1LVL is detec-
ted)
Voltage detection 1 status flag (Mag-
nitude relation of VDD and VD1LVL
when they are read)
Selection for detection voltage 1
Selects the operation mode of volt-
age detection 2
Enables/disables the operation of
voltage detection 2
Selects the operation mode of volt-
age detection 1
Enables/disables the operation of
voltage detection 1
VD2F
R/W
R
7
0
7
0
-
Read Only
VD2SF
R
6
0
6
0
-
R/W
"0"
5
1
5
0
Page 84
00:
01:
10:
11:
00:
01:
10:
11:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
VD2LVL
R/W
VDD ≥ VD2LVL
VDD < VD2LVL
VDD ≥ VD2LVL
VDD < VD2LVL
3.70 +0.2 / -0.2V
3.15 +0.15 / -0.15V
2.85 +0.15 / -0.15V
Reserved
VDD ≥ VD1LVL
VDD < VD1LVL
VDD ≥ VD1LVL
VDD < VD1LVL
4.50 +0.2 / -0.2V
4.20 +0.2 / -0.2V
3.70 +0.2 / -0.2V
3.15 +0.15 / -0.15V
Generate an INTVLTD interrupt request signal
Generate a voltage detection reset 2 signal
Disables the operation of voltage detection 2
Enables the operation of voltage detection 2
Generates an INTVLTD interrupt request signal
Generates a voltage detection reset signal
Disables the operation of voltage detection 1
Enables the operation of voltage detection 1
R/W
"0"
4
0
4
0
Read
Read
VD2MOD
VD1F
R/W
R/W
3
0
3
0
Read Only
VD2EN
VD1SF
R/W
2
0
2
0
Clears VD2F to "0"
-
Clears VD1F to "0"
-
VD1MOD
R/W
1
0
1
0
Write
Write
TMP89FS60
VD1LVL
R/W
VD1EN
R/W
0
0
0
0