TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 180

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

13.4
Timer Function
RB002
TA0CR<TA0S>
TA0MOD<TA0TED>
TCA0 pin input
Source clock
Counter
TA0DRBH, L
TA0SR<TA0CPFB>
INTTCA0 interrupt request
TA0CR<TA0S>
TA0MOD<TA0TED>
TCA0 pin input
Source clock
Counter
TA0DRBH, L
TA0DRAH, L
TA0SR<TA0CPFB>
TA0SR<TA0CPFA>
INTTCA0 interrupt request
After the timer is started, if the falling edge
is detected first, no interrupt occurs.
After the timer is started, if the falling edge
is detected first, no interrupt occurs.
before the next trigger edge is detected. If the captured value is not read, it becomes undefined. TA0DRA and
TA0DRB must be read by using a 16-bit access instruction.
cleared to "0x0000".
Note 1: After the timer is started, if the edge opposite to the selected trigger edge is detected first, no capture is
The captured value must be read from TA0DRB (and also from TA0DRA for the double-edge capture)
Setting TA0CR<TA0S> to "0" during the timer operation causes the up counter to stop counting and be
Figure 13-7 Pulse Width Measurement Mode Timing Chart
executed and no INTTCA0 interrupt request occurs. In this case, the capture starts when the selected
trigger edge is detected next.
Timer start
Timer start
0
0
0
Double-edge capture (TA0MOD<TA0MCAP>=”0”)
Single-edge capture (TA0MOD<TA0MCAP>=”1”)
Count start
Count start
0
0
TA0SR read
TA0SR read
1
1
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2
2
3
3
4
4
mn-1
mn-1 mn mn+1
mn
mn
mn
TA0SR read
TA0SR read
Counter clear
0
TA0DRB read
TA0DRB read
st-1
st
Counter clear Counter clear
st
1
0
TA0SR read
TA0SR read
2
1
TA0DRA read
TMP89FS60
2
3
Timer stop
Timer stop
0
Counter clear
0