TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 319

• Manufacturer Part Number: TMP89xy60UG/FG
• Manufacturer: Toshiba

Specifications of TMP89xy60UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 32/60
• Ram Size: 3K
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: -
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: Y
• Number Of I/o Ports: 58
• Power Supply (v): 4.3 to 5.5

RA002
20. 10-bit AD Converter (ADC)
20.1
converter, a sample-hold circuit, a comparator, a successive comparison circuit, etc.
Note 1: Before using the AD converter, set an appropriate value to the I/O port register which is also used as an analog input port.
Note 2: The DA converter current (IREF) is automatically cut off at times other than during AD conversion.
The TMP89FS60 has a 10-bit successive approximation type AD converter.
The circuit configuration of the 10-bit AD converter is shown in Figure 20-1.
It consists of control registers ADCCR1 and ADCCR2, converted value registers ADCDRL and ADCDRH, a DA
Configuration
VAREF
AIN15
AVDD
AIN0
For details, see the section on "I/O ports".
SAIN
Input selector
4
n
A
S EN
Y
AINEN
AD converter control registers 1 and 2
Figure 20-1 10-bit AD Converter
ADCCR1
AMD
2
Sample-hold
circuit
R/2
Control circuit
R
Page 303
ADCCR2
Analog
comparator
ACK
3
Shift clock
DA converter
Reference
voltage
AD converted value registers 1 and 2
approximation circuit
ADCDRL
Successive
R/2
10
10
8
AVSS
ADCDRH
2
INTADC
TMP89FS60