TMP89xy60UG/FG Toshiba, TMP89xy60UG/FG Datasheet - Page 347

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TMP89xy60UG/FG

Manufacturer Part Number
TMP89xy60UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP89xy60UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
32/60
Ram Size
3K
Driver Led
8
Driver Lcd
-
Spi/sio Channels
-
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
Y
Number Of I/o Ports
58
Power Supply (v)
4.3 to 5.5
RA006
21.5
21.5.1
the flash memory, if data in flash memory is being erased or if a security setting is being made in the flash memory.
When performing these operation on the flash memory area, the flash memory cannot be directly accessed by using
a program in the flash memory; the flash memory must be accessed using a program in the BOOTROM area or the
RAM area.
erased in units of 4 kbytes, and all data in the flash memory can be erased at one stroke. A read can be performed
using one memory transfer instruction. A write or erase, however, must be performed using more than one memory
transfer instruction because the command sequence method is used. For information on the command sequence, refer
to Table 21-1.
21.5.1.1
Note 1: To allow a program to resume control on the flash memory area that is rewritten, it is recommended that you let
Note 2: Do not reset the MCU (including a reset generated due to internal factors) when data is being written to the flash
A read or a program fetch cannot be performed on the whole of the flash memory area if data is being written to
Data can be written to and read from the flash memory area in units of one byte. Data in the flash memory can be
Access to the Flash Memory Area
ROM area. Since almost all operations relating to access to the flash memory can be controlled simply using data
supplied through the serial interface (UART or SIO), it is not necessary to operate the control register for the
user. For details of the serial PROM mode, see "Serial PROM Mode".
other than UART and SIO, it is necessary to execute a control program in the RAM area by using the RAM loader
command of the serial PROM mode. How to execute this control program is described in "21.5.1.1 How to transfer
and write a control program to the RAM area in RAM loader mode of the serial PROM mode".
The serial PROM mode is used to access the flash memory by using a control program provided in the BOOT-
To access the flash memory in serial PROM mode by using a user-specific program or peripheral functions
Flash memory control in serial PROM mode
program to be executed in the RAM area must be generated in the Intel-Hex format and be transferred using
the RAM loader of the serial PROM mode.
by a program transferred to the RAM area. The following procedure is linked with a program example to be
explained later.
the program jump (return) after verifying that the program has been written properly.
memory, data is being erased from the flash memory or the security command is being executed. If a reset occurs,
there is the possibility that data in the flash memory may be rewritten to an unexpected value.
PROM mode
How to execute a control program in the RAM area in serial PROM mode is described below. A control
Steps 1 and 2 shown below are controlled by a program in the BOOTROM, and other steps are controlled
How to transfer and write a control program to the RAM area in RAM loader mode of the serial
1. Transfer the write control program to the RAM area in RAM loader mode.
2. Jump to the RAM area.
3. Set a nonmaskable interrupt vector in the RAM area.
4. Set FLSCR1<FLSMD> to "0y101", and specify the area to be erased by making the appropriate
5. Execute the erase command sequence.
6. Read the same flash memory address twice consecutively.
7. Specify the area (area erased in step 5 above) to which data is written by making the appropriate
8. Execute the write command sequence.
9. Read the same flash memory address twice consecutively.
FLSCR1<FAREA> setting. (Make the appropriate FLSCR1<ROMSEL> setting as required.)
Then set "0xD5" on FLSCR2<CR1EN>.
(Repeat step 6 until the read values become the same.)
FLSCR1<FAREA> setting. (Make the appropriate FLSCR1<ROMSEL> setting as required.)
Then set "0xD5" on FLSCR2<CR1EN>.
(Repeat step 9 until the read values become the same.)
Page 331
TMP89FS60

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