MAS3507D Micronas Intermetall, MAS3507D Datasheet - Page 12

• Manufacturer Part Number: MAS3507D
• Description: Mpeg 1/2 Layer 2/3 Audio Decoder
• Manufacturer: Micronas Intermetall

MAS 3507D
2.7.3. Parallel Input Output Interface (PIO)
The parallel interface of the MAS 3507D uses the lines
PI0...PI4, PI8, PI12...PI19, and several control lines.
2.7.3.1. PIO-DMA Input Mode
By setting the PIO pin PI4 to “1”, the PIO-DMA input
mode of the MAS 3507D is activated after reset.
Normally, the input mode should not be altered in a
customer’s application. Should this nonetheless be
desired, the necessary changes are described in
Table 2–4 and Table 2–5.
2.7.3.2. Writing MPEG Data to the PIO-DMA
The PIO-DMA mode enables the writing of 8-bit paral-
lel MPEG data to the MAS 3507D. In this mode, PIO
lines PI19...PI12 are switched to the MAS 3507D data
input which hence will be an 8-bit parallel input port
with MSB first (at position PI19) for the MPEG bit
stream data. In order to write data to this parallel port
successfully, a special handshake protocol has to be
used by the controller (see Fig. 2–5).
Note: Either SII has to be set to “1”, or SIC clock input
has to be stopped (“0”) in this mode.
.
PI[19:12]
Fig. 2–5: Handshake protocol for writing MPEG data to the PIO-DMA
12
EOD
RTR
PR
t
st
Byte 1
t
pd
t
r
t
set
t
rtrq
t
h
t
pr
MAS 3507D latches the PIO DATA
t
rpr
.
Table 2–4: Switching from SDI- to PIO-DMA-Input
Table 2–5: Switching from PIO-DMA- to SDI-Input
Address
$e6, Bit 4
1)
Step
1
2
1)
Note: These 2 steps must be done in above
order!
PIO Configuration Register
Startup Configuration Register
Byte 15
Address
$e6, Bit 4
$4b
1)
t
eod
1)
PRELIMINARY DATA SHEET
Value
1
t
eodq
Value
0
$82
high
low
high
low
high
low
high
low
Micronas