MAS3507D Micronas Intermetall, MAS3507D Datasheet - Page 15

• Manufacturer Part Number: MAS3507D
• Description: Mpeg 1/2 Layer 2/3 Audio Decoder
• Manufacturer: Micronas Intermetall

PRELIMINARY DATA SHEET
2.8. Start-up Configuration
Basic operation of the MAS 3507D is possible without
controller interaction. Configuration and the most
important status information are available by the PIO
interface. The start-up configuration is selected
according to the levels of several PIO pins. The levels
should be set via high impedance resistors (for exam-
ple 10 k
StartupConfig register directly after power up / reset.
After start-up, the PIO will be reconfigured as output.
To enable greater flexibility, it is possible to configure
the MAS 3507D without using the PIO pins or to recon-
figure the IC after start-up. The procedure for this is to
send two I
– Writing the StartupConfig register (see Section 3.6.
– Execute a ‘run $0fcd’ command (see
The configuration will be active up to a reset. Then, the
new configuration will be loaded again via PIO.
2.8.1. Parallel Input Output Interface (PIO)
During start-up, the PIO will read the start-up configu-
ration. This is to define the environment for the
MAS 3507D. The following pins must be connected via
resistors to VSS or VDD:
Micronas
on page 26)
Section 3.3.1.).
2
to VSS or VDD and will be copied into the
C commands to the MAS 3507D:
Table 2–8: Start-up configuration
1) Start-up setting can be changed by I
PIO
Pin
PI8
PI4
PI3
PI2
PI1
PI0
after reset.
“0”
divide CLKO by 1,
2, or 4 (according
to MPEG 1, 2, or
2.5)
SDI input mode
Enable layer 3
Enable layer 2
SDO output: 32 bit
input: Multimedia
mode (PLL off)
MAS 3507D
1)
“1”
CLKO fixed at
24.576 or
22.5792 MHz
PIO-DMA input
mode
Disable layer 3
Disable layer 2
SDO output: 16 bit
input: Broadcast
mode (PLL on)
2
C commands
15