MAS3507D Micronas Intermetall, MAS3507D Datasheet - Page 18

• Manufacturer Part Number: MAS3507D
• Description: Mpeg 1/2 Layer 2/3 Audio Decoder
• Manufacturer: Micronas Intermetall

MAS 3507D
3. Control Interfaces
3.1. I
3.1.1. Device and Subaddresses
The MAS 3507D is controlled via the I
interface.
The IC is selected by transmitting the MAS 3507D
device addresses. (see Table 3–1).
Writing is done by sending the device write address,
(
more bytes of data. Reading is done by sending the
write device address ($3a), followed by the subad-
dress byte ($69). Without sending a stop condition,
reading of the addressed data is completed by sending
the device read address ($3b) and reading n-bytes of
data.
Table 3–2: I
Table 3–3: Control Register (Subaddress: $6a)
18
$3a
Name
CONTROL_MAS
WR_MAS
RD_MAS
Name
CONTROL
) followed by the subaddress byte (
2
C Bus Interface
2
C Bus Subaddresses
Subaddress
$6a
Binary Value
0000 0000
0110 1000
0110 1001
1 : Reset
Bit : 8
0 : normal
2
C bus slave
$68
Hex Value
$6a
$68
$69
), two or
Write
Mode
Write
Write
Bit : 0-7, 9-15
0
By means of the RESET bit in the CONTROL register,
the MAS 3507D can be reset by the controller.
Due to the internal architecture of the MAS 3507D, the
IC cannot react immediately to an I
typical response time is about 0.5 ms. If the
MAS 3507D cannot accept another complete byte of
data until it has performed some other function (for
example, decoding MP3 data), it will hold the clock line
I2C_CL LOW to force the transmitter into a wait state.
The positions within a transmission where this may
happen are indicated by ’Wait’ in section 3.4. The max-
imum wait period of the MAS 3507D during normal
operation mode is less than 4 ms.
Table 3–1: I
MAS 3507D Device
Address
MAS_I2C_ADR
Function
control subaddress (see Table 3–3)
write subaddress
read subaddress
2
C Bus Device Addresses
PRELIMINARY DATA SHEET
Write
$3a
2
C request. The
Read
$3b
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