MAS3507D Micronas Intermetall, MAS3507D Datasheet - Page 16

no-image

MAS3507D

Manufacturer Part Number
MAS3507D
Description
Mpeg 1/2 Layer 2/3 Audio Decoder
Manufacturer
Micronas Intermetall
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MAS3507D
Manufacturer:
MICRONAS
Quantity:
20 000
Part Number:
MAS3507D F10
Manufacturer:
MICRONAS
Quantity:
650
Part Number:
MAS3507D F10
Manufacturer:
MICRONAS
Quantity:
20 000
Part Number:
MAS3507D-BF-F10
Manufacturer:
LITTLEFUSE
Quantity:
34 000
Part Number:
MAS3507D-F10
Manufacturer:
BOTHHAND
Quantity:
1 952
Part Number:
MAS3507D-QG-G12
Manufacturer:
MICREL
Quantity:
560
Part Number:
MAS3507DF
Manufacturer:
IDT
Quantity:
6 218
Part Number:
MAS3507DF10
Manufacturer:
ALTERA
0
Part Number:
MAS3507DF10
Manufacturer:
MICRONAS
Quantity:
20 000
MAS 3507D
2.9. Status Pins in SDI Input Mode
After having read the start-up configuration, the PIO
will be switched to ‘ P-mode’. In P-mode, the addi-
tional PIO control lines (PR, PCS ) are evaluated. If the
MPEG decoder firmware detects PR = ‘1’ and the
PCS = ‘0’. Then, all PIO interface lines are configured
as output and display some status information of the
MPEG decoder. The PIO lines can be read by an
external controller or directly used by dedicated hard-
ware blocks (e.g. for sample rate indication or display
units). The internal MPEG decoder firmware attaches
specific functions to the following pins.
The MPEG-FRAME-SYNC signal is set to ‘1’ after the
internal decoding for the MPEG header has been fin-
ished for one frame. The rising edge of this signal
could be used as an interrupt input for the controller
that triggers the read out of the control information and
ancillary data. As soon as the MAS 3507D has recog-
nized the corresponding read command (‘read control
interface data’ (see Section 3.3.2. on page 21), the
MPEG-FRAME-SYNC is reset. This behavior reduces
the possibility of missing the MPEG-FRAME-SYNC
active state.
Fig. 2–8: Schematic timing of MPEG-FRAME-Sync
The time t
controller. This time must not exceed 1/2 of the MPEG-
frame length t
in Table 2–10
16
MPEG-FRAME-SYNC
V
l
h
t
frame
read
=24 ... 72 ms
frame
depends on the response time of the
. The MPEG frame lengths are given
t
read
Table 2–9: PIO output signals during MPEG decoding
in SDI mode
.
PIO
Pin
PI19
PI18,
PI17
PI13,
PI12
PI8
PI4
PI3,
PI2
PI1,
PI0
1)
2)
Layer 1 bit streams will not be decoded
Sampling frequency also defined by MPEG index
(see Table 3–12 for additional information)
Name
Demand PIN
%0
%1
MPEG INDEX
%00
%01
%10
%11
MPEG Layer ID
%00
%01
%10
%11
MPEG CRC-ERROR
%0
%1
MPEG-FRAME-
SYNC
Sampling frequency
%00
%01
%10
%11
Deemphasis
%00
%01
%10
%11
PRELIMINARY DATA SHEET
Comment
no input data exp.
input data request
MPEG 2.5
reserved
MPEG 2
MPEG 1
reserved
Layer 3
Layer 2
Layer 1
no error
CRC-error,
MPEG decoding
not successful
see following text
in kHz
44.1 / 22.1 / 11.0
48 / 24 / 12
32 / 16 / 8
reserved
none
50/15 s
reserved
CCITT J.17
2)
1)
Micronas

Related parts for MAS3507D