CS8952T-CQ Cirrus Logic, CS8952T-CQ Datasheet - Page 13
CS8952T-CQ
Manufacturer Part Number
CS8952T-CQ
Description
100BASE E-X AND 10BASE-T TRANSCEIVER
Manufacturer
Cirrus Logic
Datasheet
1.CS8952T-CQ.pdf
(86 pages)
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LED3 - Link Good LED. Open Drain Output, Pin 71.
LED4 - Polarity/Full Duplex LED. Open Drain Output, Pin 72.
LED5 - Collision/Descrambler Lock LED. Open Drain Output, Pin 73.
LPBK - Loopback Enable. Input, Pin 51.
LPSTRT - Low Power Start. Input, Pin 50.
DS206TPP2
CS8952T
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
This active-low output indicates the CS8952T has detected a valid link.
This pin can be simultaneously connected to an LED and to a TTL-compatible, CMOS input
pin.
This active-low output indicates:
1) for 100 Mb/s operation, the CS8952T is in full-duplex operation,
2) for 10 Mb/s operation, either good polarity exists or full duplex is selected (see bit 1 in the
PCS Sub-layer Configuration Register (address 17h)).
This pin can be simultaneously connected to an LED and to a TTL-compatible, CMOS input
pin.
This active-low output is asserted when either the CS8952T detects a collision (bit 11 of the
PCS Sub-Layer Configuration Register (address 17h) is clear), or the 100BASE-TX
descrambler is synchronized (bit 11 of the PCS Sub-Layer Configuration Register (address 17h)
is set). It contains a pulse stretcher to insure that the collision events are visible when the pin
is used to drive an LED.
This pin can be simultaneously connected to an LED and to a TTL-compatible, CMOS input
pin.
When this pin is asserted high and the CS8952T is operating in 100 Mb/s mode, the CS8952T
will perform a local loopback inside the PMD block. The loopback includes all CS8952T
100 Mb/s functionality except the MLT-3 coders and the analog line interface blocks.
When asserted high and the CS8952T is operating in 10 Mb/s mode, the CS8952T will perform
a local ENDEC loopback.
When this active-low input is asserted during power-up or reset, the CS8952T will exit reset in
a low power configuration, where the only circuitry enabled is that necessary to maintain the
media impedance. The CS8952T will remain in a low power state until RESET pin is asserted
or the MDC pin toggles.
This pin includes a weak internal pull-down (> 20 K ), or the value may be set by an external
4.7 K
pull-up or pull-down resistor.
CIRRUS LOGIC ADVANCED PRODUCT DATABOOK
13
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