CS8952T-CQ Cirrus Logic, CS8952T-CQ Datasheet - Page 54

• Manufacturer Part Number: CS8952T-CQ
• Description: 100BASE E-X AND 10BASE-T TRANSCEIVER
• Manufacturer: Cirrus Logic

PCS Sub-Layer Configuration Register - Address 17h (Cont.)
54
3
2
1
0
BIT
Rx Disable
LED1 Mode
LED4 Mode
Digital Reset
NAME
Read/Write 0
Read/Write 0
Read/Write 0
Read/Write 0
CIRRUS LOGIC ADVANCED PRODUCT DATABOOK
TYPE
RESET
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
When set, the receiver is disabled and no incoming
packets pass through the receiver. The link will
remain established and, if operating at 100 Mb/s, the
descrambler will remain locked. When clear, the
receiver is enabled.
If Rx Disable is set while a packet is being received,
reception is completed and no subsequent receive
packets are allowed until Rx Disable is cleared again.
Also, if Rx Disable is cleared while a packet is being
received, the receiver will remain disabled until the
end of the incoming packet. This prevents fragments
from being sent to the MAC.
Note: This bit is disabled, and writes to this bit are
ignored when the National Compatibility Mode bit of
the 10BASE-T Configuration Register (address 1Ch)
is set.
This bit defines the mode of Pin LED1. When this bit
is set, pin LED1 indicates Carrier Integrity Monitor
status as determined by the CIM Status bit in the Self
Status Register (address 19h). When this bit is clear,
LED1 indicates 10 Mb/s or 100 Mb/s transmission
activity.
This bit defines the mode of Pin LED4. When this bit
is set, pin LED4 indicates full duplex mode for
10 Mb/s or 100 Mb/s. When this bit is clear, LED4
indicates Polarity in 10 Mb/s mode or full-duplex in
100 Mb/s mode.
When set, this bit will reset all digital logic and regis-
ters to their initial values. The analog circuitry will not
be affected.
Note: This bit is disabled, and writes to this bit are
ignored when the National Compatibility Mode bit of
the 10BASE-T Configuration Register (address 1Ch)
is set.
DESCRIPTION
DS206TPP2
CS8952T