CS8952T-CQ Cirrus Logic, CS8952T-CQ Datasheet - Page 29

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CS8952T-CQ

Manufacturer Part Number
CS8952T-CQ
Description
100BASE E-X AND 10BASE-T TRANSCEIVER
Manufacturer
Cirrus Logic
Datasheet
CONFIGURATION
The CS8952T can be configured in a variety of
ways. All control and status information can be ac-
cessed via the MII Serial Management Interface.
Additionally, many configuration options can be
set at power-up or reset times via individual control
lines. Some configuration capabilities are available
at any time via individual control lines.
Configuration At Power-up/Reset Time
At power-up and reset time, the following pins are
used to configure the CS8952T.
DS206TPP2
CS8952T
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
10BT_SER
AN[1:0]
BP4B5B
BPALIGN
ISODEF
LPSTRT
PHYAD[4:0]
REPEATER
MII_DRV
TCM
TXSLEW[1:0] Set 100BASE-TX transmitter output
Pin Name
Table 7. Reset Configuration Pins
Select 10BASE-T serial mode
Select auto-negotiation mode
Bypass 4B5B coders
Bypass 4B5B coders and scramblers
Electrically isolate MII after reset
Start in low power mode
Set MII PHY address
Control definition of CRS pin, enable
carrier integrity monitor and SQE func-
tion
Set MII driver strength
Set TX_CLK mode
slew rate
CIRRUS LOGIC ADVANCED PRODUCT DATABOOK
Function
Configuration Via Control Pins
The following pins are for dedicated control signals
and can be used at any time to configure the
CS8952T.
Configuration via the MII
The CS8952T supports configuration by software
control through the use of 16-bit configuration and
status registers accessed via the MDIO/MDC pins
(MII Management Interface). The first seven regis-
ters are defined by the IEEE 802.3 specification.
Additional registers extend the register set to pro-
vide enhanced monitoring and control capabilities.
Pin Name
PWRDN
RESET
LPBK
Table 8. Dedicated Control Pins
Enter loopback mode
Enter power-down mode
Reset
Function
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