AD9518-2 Analog Devices, Inc., AD9518-2 Datasheet - Page 10

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AD9518-2

Manufacturer Part Number
AD9518-2
Description
6-output Clock Generator With Integrated 2.2 Ghz Vco
Manufacturer
Analog Devices, Inc.
Datasheet

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AD9518-2
SERIAL CONTROL PORT
Table 13.
Parameter
CS (INPUT)
SCLK (INPUT)
SDIO (WHEN INPUT)
SDIO, SDO (OUTPUTS)
TIMING
PD, SYNC, AND RESET PINS
Table 14.
Parameter
INPUT CHARACTERISTICS
RESET TIMING
SYNC TIMING
Input Logic 1 Voltage
Input Logic 0 Voltage
Input Logic 1 Current
Input Logic 0 Current
Input Capacitance
Input Logic 1 Voltage
Input Logic 0 Voltage
Input Logic 1 Current
Input Logic 0 Current
Input Capacitance
Input Logic 1 Voltage
Input Logic 0 Voltage
Input Logic 1 Current
Input Logic 0 Current
Input Capacitance
Output Logic 1 Voltage
Output Logic 0 Voltage
Clock Rate (SCLK, 1/t
Pulse Width High, t
Pulse Width Low, t
SDIO to SCLK Setup, t
SCLK to SDIO Hold, t
SCLK to Valid SDIO and SDO, t
CS to SCLK Setup and Hold, t
CS Minimum Pulse Width High, t
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Capacitance
Pulse Width Low
Pulse Width Low
LO
HI
DH
SCLK
DS
)
Min
2.0
50
1.5
S
, t
DV
H
PWH
Typ
110
2
Max
0.8
1
Min
2.0
2.0
2.0
2.7
16
16
2
1.1
2
3
Unit
V
V
μA
μA
pF
ns
High speed clock cycles
Typ
110
2
110
2
10
20
2
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Max
0.8
3
0.8
1
0.8
0.4
25
8
Unit
V
V
μA
μA
pF
V
V
μA
μA
pF
V
V
nA
nA
pF
V
V
MHz
ns
ns
ns
ns
ns
ns
ns
Test Conditions/Comments
These pins each have a 30 kΩ internal pull-up resistor
High speed clock is CLK input signal
Test Conditions/Comments
CS has an internal 30 kΩ pull-up resistor
SCLK has an internal 30 kΩ pull-down resistor

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