AD9518-2 Analog Devices, Inc., AD9518-2 Datasheet - Page 51

• Manufacturer Part Number: AD9518-2
• Description: 6-output Clock Generator With Integrated 2.2 Ghz Vco
• Manufacturer: Analog Devices, Inc.

Reg.
Addr
(Hex) Bit(s) Name
17
18
18
18
18
<1:0> Antibacklash <1>
<6:5> Lock Detect
<4>
<3>
<2:1> VCO Cal
Pulse Width 0
Counter
Digital Lock
Detect
Window
Disable
Digital
Lock Detect <3> = 1; disables lock detect.
Divider
Description
<7>
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
Required consecutive number of PFD cycles with edges inside lock detect window before the DLD indicates
a locked condition.
<6>
0
0
1
1
If the time difference of the rising edges at the inputs to the PFD is less than the lock detect window time, the
digital lock detect flag is set. The flag remains set until the time difference is greater than the loss-of-lock threshold.
<4> = 0; high range.
<4> = 1; low range.
Digital lock detect operation.
<3> = 0; normal lock detect operation.
VCO calibration divider. Divider used to generate the VCO calibration clock from the PLL reference clock.
<2> <1> VCO Calibration Clock Divider
0
0
1
1
0
1
0
1
<6> <5> <4>
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
<0>
0
1
0
1
<5>
0
1
0
1
16 (default)
2
4
8
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Antibacklash Pulse Width (ns)
2.9
1.3
6.0
2.9
PFD Cycles to Determine Lock
5
16
64
255
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
<3>
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
<2>
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Rev. 0 | Page 51 of 64
Level or
Dynamic
Signal
LVL
LVL
DYN
DYN
DYN
DYN
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LVL
LD pin comparator output (active high).
Status of REF1 frequency (active low).
Status of REF2 frequency (active low).
Status of VCO frequency (active low).
Selected reference (low = REF2, high = REF1).
Digital lock detect (DLD) (active low).
Holdover active (active low).
LD pin comparator output (active low).
Signal at STATUS Pin
VS (PLL supply).
REF1 clock (differential reference when in differential mode).
REF2 clock (not available in differential mode).
Selected reference to PLL (differential reference when in
differential mode).
Unselected reference to PLL (not available when in
differential mode).
Status of selected reference (status of differential reference);
active low.
Status of unselected reference (not available in differential
mode); active low.
(Status of REF1 frequency) AND (status of REF2 frequency).
(DLD) AND (status of selected reference) AND (status of VCO).
AD9518-2