AD9518-2 Analog Devices, Inc., AD9518-2 Datasheet - Page 7

• Manufacturer Part Number: AD9518-2
• Description: 6-output Clock Generator With Integrated 2.2 Ghz Vco
• Manufacturer: Analog Devices, Inc.

TIMING CHARACTERISTICS
Table 5.
Parameter
LVPECL
PROPAGATION DELAY, t
OUTPUT SKEW, LVPECL OUTPUTS
1
CLOCK OUTPUT ADDITIVE PHASE NOISE (DISTRIBUTION ONLY; VCO DIVIDER NOT USED)
Table 6.
Parameter
CLK-TO-LVPECL ADDITIVE PHASE NOISE
This is the difference between any two similar delay paths while operating at the same voltage and temperature.
Output Rise Time, t
Output Fall Time, t
High Frequency Clock Distribution Configuration
Clock Distribution Configuration
Variation with Temperature
LVPECL Outputs That Share the Same Divider
LVPECL Outputs on Different Dividers
All LVPECL Outputs Across Multiple Parts
CLK = 1 GHz, OUTPUT = 1 GHz
Divider = 1
CLK = 1 GHz, OUTPUT = 200 MHz
Divider = 5
@ 10 Hz Offset
@ 100 Hz Offset
@ 1 kHz Offset
@ 10 kHz Offset
@ 100 kHz Offset
@ 1 MHz Offset
@ 10 Hz Offset
@ 100 Hz Offset
@ 1 kHz Offset
@ 10 kHz Offset
@ 100 kHz Offset
@ 1 MHz Offset
@ 10 MHz Offset
@ 100 MHz Offset
>10 MHz Offset
FP
RP
PECL
, CLK-TO-LVPECL OUTPUT
1
Min
Min
835
773
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Typ
−109
−118
−130
−139
−144
−146
−147
−149
−120
−126
−139
−150
−155
−157
−157
Typ
70
70
995
933
0.8
5
13
Max
Max
180
180
1180
1090
15
40
220
Unit
ps
ps
ps
ps
ps/°C
ps
ps
ps
Unit
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Test Conditions/Comments
Termination = 50 Ω to V
20% to 80%, measured differentially
80% to 20%, measured differentially
See Figure 27
See Figure 29
Test Conditions/Comments
Distribution section only; does not include
PLL and VCO
Input slew rate > 1 V/ns
Input slew rate > 1 V/ns
S
− 2 V; level = 810 mV
AD9518-2