cy28351-400 SpectraLinear Inc, cy28351-400 Datasheet

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cy28351-400

Manufacturer Part Number
cy28351-400
Description
Differential Clock Buffer/driver
Manufacturer
SpectraLinear Inc
Datasheet
Rev 1.0, November 28, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Features
• Supports 333-MHz and 400-MHz DDR SDRAM
• 60 – 273-MHz operating frequency
• Phase-locked loop (PLL) clock distribution for double
• Distributes one clock input to ten differential outputs
• External feedback pin (FBIN) is used to synchronize the
• Conforms to the DDRI specification
• Spread Aware™ for electromagnetic interference (EMI)
• 48-pin SSOP package
Block Diagram
data rate synchronous DRAM applications
outputs to the clock input
reduction
SDATA
CLKIN
AVDD
SCLK
FBIN
PLL
Interface
Serial
Logic
10
FBOUT
Tel:(408) 855-0555
YT0
YC0
YT1
YC1
YT2
YC2
YT3
YC3
YT4
YC4
YT5
YC5
YT6
YC6
YT7
YC7
YT8
YC8
YT9
YC9
Description
This PLL clock buffer is designed for 2.6V
operation and differential outputs levels.
This device is a zero delay buffer that distributes a clock input
(CLKIN) to ten differential pairs of clock outputs (YT[0:9],
YC[0:9]) and one feedback clock output (FBOUT). The clock
outputs are individually controlled by the serial inputs SCLK
and SDATA.
The two-line serial bus can set each output clock pair (YT[0:9],
YC[0:9]) to the Hi-Z state. When AV
turned off and bypassed for the test purposes.
The PLL in this device uses the input clock (CLKIN) and the
feedback clock (FBIN) to provide high-performance, low-skew,
low-jitter output differential clocks.
Differential Clock Buffer/Driver
Pin Configuration
VDDQ
VDDQ
CLKIN
AVDD
SCLK
AVSS
VDD
VDDI
VSS
YT0
VSS
VSS
VSS
VSS
YC0
Fax:(408) 855-0550
YC1
YC2
YC3
YC4
YT1
YT2
YT3
YT4
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
CY28351-400
www.SpectraLinear.com
NC
YC5
YT5
YT6
YC6
YC7
YT7
FBOUT
YC8
YT8
YC9
VSS
VDDQ
VSS
VSS
VDDQ
FBIN
VDDQ
VSS
VDDQ
VSS
SDATA
NC
YT9
DD
is grounded, the PLL is
DD
Page 1 of 7
and 2.6AV
DD

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