pcf8814 NXP Semiconductors, pcf8814 Datasheet - Page 20
pcf8814
Manufacturer Part Number
pcf8814
Description
Pcf8814 65 X 96 Pixels Matrix Lcd Driver
Manufacturer
NXP Semiconductors
Datasheet
1.PCF8814.pdf
(72 pages)
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Philips Semiconductors
10 I
10.1
The I
communication between different ICs or modules with
speeds up to 3.4 MHz. The only difference between
Hs-mode slave devices and Fast-mode slave devices is
the speed at which they operate therefore the buffers on
the SLCH and SDAH outputs
configuration. This is the same for I
which have an open-drain SDAH output and a combination
of an open-drain pull-down and current source pull-up
circuits on the SCLH output. Only the current source of one
master is enabled at any one time, and only during
Hs-mode. Both lines must be connected to a positive
supply via a pull-up resistor.
Data transfer may be initiated only when the bus is not
busy.
(1) In Hs-mode, SCL and SDA lines operating at the higher
frequency are referred to as SCLH and SDAH.
10.1.2
One data bit is transferred during each clock pulse. The
data on the SDAH line must remain stable during the HIGH
2003 Mar 13
handbook, full pagewidth
65
2
2
C-BUS INTERFACE (H
C-bus Hs-mode is for bidirectional, 2-line
Characteristics of the I
B
96 pixels matrix LCD driver
IT TRANSFER
SCL
SDA
TRANSMITTER/
RECEIVER
MASTER
SDA
(1)
SCL
S
-MODE)
2
have an open-drain
C-bus (Hs-mode)
2
C-bus master devices
RECEIVER
SLAVE
Fig.22 System configuration.
data valid
data line
stable;
Fig.23 Bit transfer.
TRANSMITTER/
RECEIVER
SLAVE
20
allowed
change
of data
10.1.1
The system configuration shown in Fig.22 comprises:
period of the clock pulse as changes in the data line at this
time will be interpreted as a control signal. See Fig.23.
Transmitter: the device which sends the data to the bus
Receiver: the device which receives the data from the
bus
Master: the device which initiates a transfer, generates
clock signals and terminates a transfer
Slave: the device addressed by a master
Multi-master: more than one master can attempt to
control the bus at the same time without corrupting the
message
Arbitration: procedure to ensure that, if more than one
master simultaneously tries to control the bus, only one
is allowed to do so and the message is not corrupted
Synchronisation: procedure to synchronize the clock
signals of two or more devices.
S
YSTEM CONFIGURATION
TRANSMITTER
MASTER
MBC621
TRANSMITTER/
RECEIVER
MASTER
Objective specification
MGA807
PCF8814
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