pcf8814 NXP Semiconductors, pcf8814 Datasheet - Page 21

• Manufacturer Part Number: pcf8814
• Description: Pcf8814 65 X 96 Pixels Matrix Lcd Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
10.1.3
Both data and clock lines remain HIGH when the bus is not
busy. A HIGH-to-LOW transition of the data line, while the
10.1.4
Each byte of 8 bits is followed by an acknowledge bit. The
acknowledge bit is a HIGH signal put on the bus by the
transmitter during which time the master generates an
extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an
acknowledge after the reception of each byte. Also a
master receiver must generate an acknowledge after the
reception of each byte that has been clocked out of the
slave transmitter.
2003 Mar 13
handbook, full pagewidth
handbook, full pagewidth
65
S
A
96 pixels matrix LCD driver
TART AND STOP CONDITIONS
CKNOWLEDGE
BY TRANSMITTER
SDA
SCL
DATA OUTPUT
DATA OUTPUT
BY RECEIVER
SCL FROM
MASTER
START condition
S
Fig.24 Definition of START and STOP conditions.
condition
START
S
Fig.25 Acknowledge on the I
1
21
clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is
HIGH is defined as the STOP condition (P). See Fig.24.
The device that acknowledges must pull-down the SDA
line during the acknowledge clock pulse, so that the SDA
line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times
must be taken into consideration). A master receiver must
signal an end of data to the transmitter by not generating
an acknowledge on the last byte that has been clocked out
of the slave. In this event the transmitter must leave the
data line HIGH to enable the master to generate a STOP
condition.
The acknowledge timing is shown in Fig.25.
2
2
C-bus.
not acknowledge
STOP condition
acknowledge
8
P
acknowledgement
clock pulse for
MBC622
9
MBC602
Objective specification
SDA
SCL
PCF8814