cy8c3446lti-075es2 Cypress Semiconductor Corporation., cy8c3446lti-075es2 Datasheet - Page 13

• Manufacturer Part Number: cy8c3446lti-075es2
• Description: Psoc? 3 Cy8c34 Family Errata Silicon Revision Es2
• Manufacturer: Cypress Semiconductor Corporation.

15. Comparator Wakeup
16. Comparator Enable
January 7, 2011
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PROBLEM DEFINITION
The device is unable to wake from sleep when trigged by a comparator.
PARAMETERS AFFECTED
NA
TRIGGER CONDITION(S)
Using the comparator to wake the chip from a sleep to an active state.
SCOPE OF IMPACT
Comparator is unable to wake the device from sleep.
WORKAROUND
There are two possible workarounds:
1. Low Offset Workaround: Add an external comparator device and connect its digital output to a GPIO pin
2. Internal Workaround: Configure an SIO and GPIO pin to act as a comparator using the SIO pin in
FIX STATUS
Silicon revision fix confirmed in production silicon.
PROBLEM DEFINITION
The LSB of the Active Power Mode Configuration Register (PM_ACT_CFG7, 0x43A7), which is used to enable
the comparators on a PSoC device have bits 1 and 2 reversed. Bit 1 controls comparator 2 and bit 2 controls
comparator 1.
PARAMETERS AFFECTED
NA
TRIGGER CONDITION(S)
Enabling comparator 1 and comparator 2 using the PM_ACT_CFG7 ( 0x43A7).
SCOPE OF IMPACT
None.
WORKAROUND
PSoC Creator implements the required software workaround. When writing to these registers directly, write to
bit 1 to control comparator 2 and write to bit 2 to control comparator 1.
FIX STATUS
Silicon revision fix confirmed in production silicon.
configured for wake on interrupt
differential mode and the GPIO pin to route in the differential signal reference for the SIO. See Cypress
Application Note AN60580 for information on how to implement a comparator with SIO
Document Number: 001-61136 Rev. *C
Errata Document
PSoC
®
3: CY8C34 Family
13
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