cy8c3446lti-075es2 Cypress Semiconductor Corporation., cy8c3446lti-075es2 Datasheet - Page 15

• Manufacturer Part Number: cy8c3446lti-075es2
• Description: Psoc? 3 Cy8c34 Family Errata Silicon Revision Es2
• Manufacturer: Cypress Semiconductor Corporation.

19. Low Power Mode and JTAG/SWD
20. Power System Initialization
21. Sleep Request and IRQ
January 7, 2011
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PROBLEM DEFINITION
If the JTAG/SWD interfaces are enabled, the device does not enter any of the low power modes.
PARAMETERS AFFECTED
NA
TRIGGER CONDITION(S)
JTAG/SWD interface enabled.
SCOPE OF IMPACT
If either the JTAG/SWD interface is enabled and a low power mode is entered, the low power mode is skipped
and the device continues to operate in the active mode.
WORKAROUND
None.
FIX STATUS
Silicon revision fix confirmed in production silicon.
PROBLEM DEFINITION
The Central Timewheel (CTW) is not automatically enabled in low power modes. See the PSoC 3: CY8C34
Family Technical Reference Manual for details. If sleep low power mode is entered and if the central timewheel
is not already enabled, increased wake times or low voltage reset may occur.
PARAMETERS AFFECTED
NA
TRIGGER CONDITION(S)
Entering sleep low power mode.
SCOPE OF IMPACT
If sleep low power mode is entered and if the central timewheel is not already enabled, the low power
regulators will not be powered, which results in either increased wake times or low voltage reset.
WORKAROUND
Enable and use the central timewheel (register bit value PM.TW_CFG2[2] = ‘1’ in PSoC 3: CY8C34 Family
Technical Reference Manual) prior to entering sleep low power mode. Central timewheel time settings are not
critical.
FIX STATUS
Silicon revision fix confirmed in production silicon.
PROBLEM DEFINITION
When a simultaneous sleep or hibernate request and IRQ is generated, the CPU halts and prevents further
code execution without entering a lower power mode.
PARAMETERS AFFECTED
NA
TRIGGER CONDITION(S)
When a sleep request and IRQ is triggered simultaneously.
SCOPE OF IMPACT
CPU is halted and further code execution is prevented.
WORKAROUND
Use the WDT to recover the CPU. This workaround does not conflict with workaround from errata item "WDT
Does Not Work in Low Power Modes" as the device does not enter a low power mode.
FIX STATUS
Silicon revision fix confirmed in production silicon.
Document Number: 001-61136 Rev. *C
Errata Document
PSoC
®
3: CY8C34 Family
15
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