cy8c3446lti-075es2 Cypress Semiconductor Corporation., cy8c3446lti-075es2 Datasheet - Page 27

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cy8c3446lti-075es2

Manufacturer Part Number
cy8c3446lti-075es2
Description
Psoc? 3 Cy8c34 Family Errata Silicon Revision Es2
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
43. USB EP0 Transaction Failures
44. USB Bus Clock
January 7, 2011
PROBLEM DEFINITION
Transfers through USB EP0 may fail. These failures manifest as STALL and Data Toggle errors.
PARAMETERS AFFECTED
None.
TRIGGER CONDITION(S)
Any USB transfer through EP0.
SCOPE OF IMPACT
Causes incorrect data packets to transfer between the device and host.
WORKAROUND
Software workaround available in PSoC Creator Beta 5. Software workaround requires multiple changes to
automatically generated APIs in PSoC Creator. Manual alteration is not feasible.
FIX STATUS
Silicon revision fix confirmed in production silicon.
PROBLEM DEFINITION
USB peripheral requires that the bus clock is greater than or equal to 33 MHz rather then the specified
minimum value of 24 MHz to meet bus timing requirements.
PARAMETERS AFFECTED
None.
TRIGGER CONDITION(S)
Bus clock less than 33 MHz when USB is enabled.
SCOPE OF IMPACT
USB generated interrupts may not be detected by the interrupt controller.
WORKAROUND
Configure the bus clock to be greater than or equal to 33 MHz. PSoC Creator provides a design rule check
for this condition.
FIX STATUS
Silicon revision fix confirmed in production silicon.
Document Number: 001-61136 Rev. *C
Errata Document
PSoC
®
3: CY8C34 Family
27
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