cy8c3446lti-075es2 Cypress Semiconductor Corporation., cy8c3446lti-075es2 Datasheet - Page 29

• Manufacturer Part Number: cy8c3446lti-075es2
• Description: Psoc? 3 Cy8c34 Family Errata Silicon Revision Es2
• Manufacturer: Cypress Semiconductor Corporation.

47. Power Mode: I
48. I
January 7, 2011
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2
C Clocking
PROBLEM DEFINITION
Setting the I
return inaccurate data. Setting this bit to unavailable results in reduced power consumption.
PARAMETERS AFFECTED
NA
TRIGGER CONDITION(S)
Setting Bit 4 (avail_i2C) of PM.AVAIL.CR4 to a value of '0'.
SCOPE OF IMPACT
Delta Sigma ADC returns inaccurate information due to portions of the Delta Sigma's logic becoming powered
down with the I
WORKAROUND
Ensure that bit 4 (avail_i2C) of PM.AVAIL.CR4 is constantly set to a value of '1'. This bit is set to the proper
value by default.
FIX STATUS
Silicon revision fix confirmed in production silicon.
PROBLEM DEFINITION
The I2C_CLK_DIV1 and I2C_CLK_DIV2 registers as described in the TRM are not implemented. The
I2C_CLK_DIV register with reduced clock divider options is implemented and described below in the
workaround section.
PARAMETERS AFFECTED
NA
TRIGGER CONDITION(S)
NA
SCOPE OF IMPACT
The resolution of generated I
WORKAROUND
The I2C_CLK_DIV1 and I2C_CLK_DIV2 registers that provide a fully programmable 10-bit clock divider are
not available. Instead use the I2C_CLK_DIV register which provides dividers of 1, 2, 4, 8, 16, 32, and 64 to
generate an appropriate SCL clock rate.
I
Reset: System reset for retention flops [reset_all_retention]
Register: Address
I2C_CLK_DIV: 0x49DB
Based on this register value, internal glitch clock enable is derived using system clock.
FIX STATUS
Silicon revision fix confirmed in production silicon.
2
SW Access: Reset
Bits
2:0
C Clock Divide Factor Register
HW Access
Name
Bits
2
Name
divide_factor[2:0]
2
C to be unavailable via the PM.AVAIL.CR4 register (0x43C4) causes the Delta Sigma ADC to
C Available
2
C hardware.
7
6
2
NA:00000
C bus SCL frequencies is reduced.
NA
5
Document Number: 001-61136 Rev. *C
Errata Document
Description
000b /1 001b /2 010b /4 011b /8 100b /16 101b /32 110b /64.
4
I
2
C
components implement the required workaround.
3
2
divide_factor
R/W:000
R
1
0
PSoC
®
3: CY8C34 Family
29
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