mc68hc711d3 Freescale Semiconductor, Inc, mc68hc711d3 Datasheet - Page 23

• Manufacturer Part Number: mc68hc711d3
• Description: M Hc11 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

2.2.4 Special Test Mode
This special expanded mode is primarily intended or production testing. The user can access a number
of special test control bits in this mode. Reset and interrupt vectors are fetched externally from locations
$BFC0–$BFFF. A switch can be made from this mode to other modes under program control.
2.3 Memory Map
Figure 2-1
expanded-multiplexed), as well as for both special modes of operation (bootstrap and test).
2.3.1 Control and Status Registers
Figure 2-2
reserved locations that make up the internal register block. This block may be mapped to any
4-K boundary in memory, but reset locates it at $0000–$003F. This mappability factor and the default
starting addresses are indicated by the use of a bold 0 as the starting character of a register’s address.
Freescale Semiconductor
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In the single-chip mode, the MCU does not generate external addresses. The internal memory
locations are shown in the shaded areas, and the contents of these shaded areas are explained
on the right side of the diagram.
In expanded-multiplexed mode, the memory locations are basically the same as in the single-chip
mode except that the memory locations between shaded areas are for externally addressed
memory and I/O.
The special bootstrap mode is similar to the single-chip mode, except that the bootstrap program
ROM is located at memory locations $BF00–$BFFF, vectors included.
The special test mode is similar to the expanded-multiplexed mode except the interrupt vectors are
at external memory locations.
illustrates the memory map for both normal modes of operation (single-chip and
is a representation of all 64 bytes of control and status registers, I/O and data registers, and
BF00 (Boot)
Address
Table 2-2. Bootstrap Mode Jump Vectors (Continued)
00EB
00EE
00FD
00FA
00F1
00F4
00F7
Real-time interrupt
IRQ
XIRQ
SWI
Illegal opcode
COP fail
Clock monitor
Reset
MC68HC711D3 Data Sheet, Rev. 2.1
Vector
Memory Map
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