mc68ec060 Freescale Semiconductor, Inc, mc68ec060 Datasheet - Page 166

• Manufacturer Part Number: mc68ec060
• Description: Mc68060 Superscalar 68k Microprocessor Including The Lc060 And Ec060
• Manufacturer: Freescale Semiconductor, Inc

The combination of operand size and alignment determines the number of bus cycles
required to perform a particular memory access. Table 7-3 lists the number of bus cycles
required for different operand sizes with all possible alignment conditions for read and write
cycles. The table confirms that alignment significantly affects bus cycle throughput for non-
cachable accesses. For example, in Figure 7-9 the misaligned long-word operand took three
bus cycles because the byte offset = $1. If the byte offset = $0, then it would have taken one
MOTOROLA
MISCELLANEOUS
ATTRIBUTES
Figure 7-11. Misaligned Long-Word Read Bus Cycle Timing
SIZ1–SIZ0
D31–D24
D23–D16
D15–D8
A31–A2
A1–A0
D7–D0
BCLK
R/W
BS0
BS1
BS2
BS3
TIP
TA
TS
C1
READ
BYTE
BYTE
C2
1
M68060 USER’S MANUAL
BYTE 0
C1
WORD
READ
WORD
C2
2
BYTE 1
BYTE 2
C1
READ
BYTE
BYTE
C2
0
BYTE 3
Bus Operation
7-11