mc68ec060 Freescale Semiconductor, Inc, mc68ec060 Datasheet - Page 39

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mc68ec060

Manufacturer Part Number
mc68ec060
Description
Mc68060 Superscalar 68k Microprocessor Including The Lc060 And Ec060
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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An instruction’s addressing mode can specify the value of an operand, a register containing
the operand, or how to derive the effective address of an operand in memory. Each address-
ing mode has an assembler syntax. Some instructions imply the addressing mode for an
operand. These instructions include the appropriate fields for operands that use only one
addressing mode. Table 1-2 lists a summary of the effective addressing modes for the
MC68060. Refer to M68000PM/AD, M68000 Family Programmer’s Reference Manual, for
details on instruction format and addressing modes.
1.9 INSTRUCTION SET OVERVIEW
The instruction set is tailored to support high-level languages and is optimized for those
instructions most commonly executed. The floating-point instructions for the MC68060 are
a commonly used subset of the MC68881/MC68882 instruction set with new arithmetic
instructions to explicitly select single- or double-precision rounding. The remaining unimple-
mented instructions are less frequently used and are efficiently emulated in the
MC68060FPSP, maintaining compatibility with the MC68881/MC68882 floating-point copro-
cessors. The MC68060 instruction set includes MOVE16 which allows high-speed transfers
of 16-byte blocks between external devices such as memory to memory or coprocessor to
memory. Table 1-3 provides an alphabetized listing of the MC68060 instruction set’s
opcode, operation, and syntax. Refer to Table 1-4 for notations used in Table 1-3. The left
operand in the syntax is always the source operand, and the right operand is the destination
operand. Refer to M68000PM/AD, M68000 Family Programmer’s Reference Manual, for
details on instructions used by the MC68060.
MOTOROLA
Register Direct
Register Indirect
Address Register Indirect with Index
Memory Indirect
Program Counter Indirect
Program Counter Indirect with Index
Program Counter Memory Indirect
Absolute Data Addressing
Immediate
Table 1-2. Effective Addressing Modes
Data
Address
Address
Address with Postincrement
Address with Predecrement
Address with Displacement
8-Bit Displacement
Base Displacement
Postindexed
Preindexed
with Displacement
8-Bit Displacement
Base Displacement
Postindexed
Preindexed
Short
Long
Addressing Modes
M68060 USER’S MANUAL
([bd,PC],Xn,od)
([bd,PC,Xn],od)
([bd,An],Xn,od)
([bd,An,Xn],od)
(d 8 ,PC,Xn)
(bd,PC,Xn)
(d 8 ,An,Xn)
(bd,An,Xn)
(d 16 ,PC)
(d16,An)
(xxx).W
Syntax
#<xxx>
(xxx).L
(An)+
–(An)
(An)
Dn
An
Introduction
1-15

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