dp83902a National Semiconductor Corporation, dp83902a Datasheet - Page 12

• Manufacturer Part Number: dp83902a
• Description: St-nictm Serial Network Interface Controller For Twisted Pair
• Manufacturer: National Semiconductor Corporation

4 0 Functional Description
3 ST-NIC flushes remaining bytes from FIFO
4 ST-NIC performs internal processing to prepare for writ-
5 ST-NIC writes 4-byte (2-word) header
6 ST-NIC de-asserts BREQ
FIFO Threshold Detection
To assure that no overwriting of data in the FIFO the FIFO
logic flags a FIFO overrun as the 13th byte is written into the
FIFO effectively shortening the FIFO to 13 bytes The FIFO
logic also operates differently in Byte Mode and in Word
Mode In Byte Mode a threshold is indicated when the n
byte has entered the FIFO thus with an 8-byte threshold
the ST-NIC issues Bus Request (BREQ) when the 9th byte
has entered the FIFO For Word Mode BREQ is not gener-
ated until n
4 word threshold (equivalent to an 8-byte threshold) BREQ
is issued when the 10th byte has entered the FIFO
Beginning of Transmit
Before transmitting the ST-NIC performs a prefetch from
memory to load the FIFO The number of bytes prefetched
is the programmed FIFO threshold The next BREQ is not
issued until after the ST-NIC actually begins transmitting
data i e after SFD
Reading the FIFO
During normal operation the FIFO must not be read The
ST-NIC will not issue an ACKnowledge back to the CPU if
the FIFO is read The FIFO should only be read during loop-
back diagnostics
PROTOCOL PLA
The protocol PLA is responsible for implementing the IEEE
802 3 protocol including collision recovery with random
backoff The Protocol PLA also formats packets during
transmission and strips preamble and synch during recep-
tion
DMA AND BUFFER CONTROL LOGIC
The DMA and Buffer Control Logic is used to control two
16-bit DMA channels During reception the local DMA
stores packets in a receive buffer ring located in buffer
memory During transmission the Local DMA uses pro-
grammed pointer and length registers to transfer a packet
from local buffer memory to the FIFO A second DMA chan-
nel is used as a slave DMA to transfer data between the
local buffer memory and the host system The Local DMA
and Remote DMA are internally arbitrated with the Local
DMA channel having highest priority Both DMA channels
use a common external bus clock to generate all required
ing the header
a
2 bytes have entered the FIFO Thus with a
(Continued)
a
1
FIGURE 2
12
bus timing External arbitration is performed with a standard
bus request bus acknowledge handshake protocol
5 0 Transmit Receive Packet
Encapsulation Decapsulation
A standard IEEE 802 3 packet consists of the following
fields preamble Start of Frame Delimiter (SFD) destination
address source address length data and Frame Check
Sequence (FCS) The typical format is shown in Figure 2
The packets are Manchester encoded and decoded by the
ENDEC module and transferred serially to the NIC module
using NRZ data with a clock All fields are of fixed length
except for the data field The ST-NIC generates and ap-
pends the preamble SFD and FCS field during transmis-
sion The Preamble and SFD fields are stripped during re-
ception (The CRC is passed through to buffer memory dur-
ing reception )
PREAMBLE AND START OF FRAME DELIMITER (SFD)
The Manchester encoded alternating 1 0 preamble field is
used by the ENDEC to acquire bit synchronization with an
incoming packet When transmitted each packet contains
62 bits of alternating 1 0 preamble Some of this preamble
will be lost as the packet travels through the network The
preamble field is stripped by the NIC module Byte align-
ment is performed with the Start of Frame Delimiter (SFD)
pattern which consists of two consecutive 1’s The ST-NIC
does not treat the SFD pattern as a byte it detects only the
two bit pattern This allows any preceding preamble within
the SFD to be used for phase locking
DESTINATION ADDRESS
The destination address indicates the destination of the
packet on the network and is used to filter unwanted pack-
ets from reaching a node There are three types of address
formats supported by the ST-NIC physical multicast and
broadcast The physical address is a unique address that
corresponds only to a single node All physical addresses
have an MSB of ‘‘0’’ These addresses are compared to the
internally stored physical address registers Each bit in the
destination address must match in order for the ST-NIC to
accept the packet Multicast addresses begin with an MSB
of ‘‘1’’ The ST-NIC filters multicast addresses using a stan-
dard hashing algorithm that maps all multicast addresses
into a 6-bit value This 6-bit value indexes a 64-bit array that
filters the value If the address consists of all 1’s it is a
broadcast address indicating that the packet is intended for
all nodes A promiscuous mode allows reception of all pack-
ets the destination address is not required to match any
filters Physical broadcast multicast and promiscuous ad-
dress modes can be selected
TL F 11157 – 7