dp83902a National Semiconductor Corporation, dp83902a Datasheet - Page 67

• Manufacturer Part Number: dp83902a
• Description: St-nictm Serial Network Interface Controller For Twisted Pair
• Manufacturer: National Semiconductor Corporation

16 0 AC Timing Test Conditions
All specifications are valid only if the mandatory isolation is
employed and all differential signals are taken to be at the
AUI side of the pulse transformer
Input Pulse Levels (TTL CMOS)
Input Rise and Fall Times (TTL CMOS)
Input and Output Reference
Input Pulse Levels (Diff )
Input and Output
TRI-STATE Reference Levels
Output Load (See Figure Below)
Note 1 50 pF includes scope and jig capacitance
Note 2 S1
Levels (TTL CMOS)
Reference Levels (Diff )
S1
S1
S1
active low to High Impedance measurements
S1
active high to High Impedance measurements
e
e
e
e
e
V
GND for V
V
GND for High Impedance to active high and
Open for timing tests for push pull outputs
CC
CC
for V
for High Impedance to active low and
OL
OH
test
test
b
350 mV to
Float (DV)
the Differential
50% Point of
GND to 3 0V
TL F 11157 – 50
b
1315 mV
g
1 3V
0 5V
5 ns
67
Pin Capacitance
DERATING FACTOR
Output timing is measured with a purely capacitive load of
50 pF The following correction factor can be used for other
loads C
Note In the above diagram the TX
Symbol
C
C
IN
OUT
AUI side of the isolation (pulse transformer) The pulse transformer
used for all testing is the Pulse Engineering PE64103
L t
50 pF
Input Capacitance
Output Capacitance
AUI Transmit Test Load
a
Parameter
0 3 ns pF
T
a
A
and TX
e
25 C f
b
signals are taken from the
e
Typ
7
7
1 MHz
TL F 11157 – 51
Units
pF
pF