dp83902a National Semiconductor Corporation, dp83902a Datasheet - Page 28

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dp83902a

Manufacturer Part Number
dp83902a
Description
St-nictm Serial Network Interface Controller For Twisted Pair
Manufacturer
National Semiconductor Corporation
Datasheet

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10 0 Internal Registers
10 3 REGISTER DESCRIPTIONS (Continued)
INTERRUPT MASK REGISTER (IMR)
The Interrupt Mask Register is used to mask interrupts Each interrupt mask bit corresponds to a bit in the Interrupt Status
Register (ISR) If an interrupt mask bit is set an interrupt will be issued whenever the corresponding bit in the ISR is set If any bit
in the IMR is set low an interrupt will not occur when the bit in the ISR is set The IMR powers up to all zeroes
Bit
D0
D1
D2
D3
D4
D5
D6
D7
PRXE
PTXE
RXEE
TXEE
OVWE
CNTE
RDCE
Reserved
Symbol
Packet Received Interrupt Enable
Packet Transmitted Interrupt Enable
Receive Error Interrupt Enable
Transmit Error Interrupt Enable
Overwrite Warning Interrupt Enable
Counter Overflow Interrupt Enable
DMA Complete Interrupt Enable
Reserved
0 Interrupt Disabled
1 Enables Interrupt when packet received
0 Interrupt Disabled
1 Enables Interrupt when packet is transmitted
0 Interrupt Disabled
1 Enables Interrupt when packet received with error
0 Interrupt Disabled
1 Enables Interrupt when packet transmission results in error
0 Interrupt Disabled
1 Enables Interrupt when Buffer Management Logic lacks sufficient buffers to store incoming packet
0 Interrupt Disabled
1 Enables Interrupt when MSB of one or more of the Network Statistics counters has been set
0 Interrupt Disabled
1 Enables Interrupt when Remote DMA transfer has been completed
7
(Continued)
RDCE CNTE OVWE TXEE
0FH (WRITE)
6
5
4
28
3
Description
RXEE
2
PTXE
1
PRXE
0

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