dp83902a National Semiconductor Corporation, dp83902a Datasheet - Page 29

• Manufacturer Part Number: dp83902a
• Description: St-nictm Serial Network Interface Controller For Twisted Pair
• Manufacturer: National Semiconductor Corporation

and
Bit
D0
D1
D2
D3
D4
D5
D6
10 0 Internal Registers
10 3 REGISTER DESCRIPTIONS (Continued)
DATA CONFIGURATION REGISTER (DCR)
This Register is used to program the ST-NIC for 8- or 16-bit memory interface select byte ordering in 16-bit applications and
establish FIFO thresholds The DCR must be initialized prior to loading the Remote Byte Count Registers LAS is set on
power up
Symbol
WTS
BOS
LAS
LS
ARM
FT0
and
FT1
Word Transfer Select
0 Selects byte-wide DMA transfers
1 Selects word-wide DMA transfers
Note When word-wide mode is selected up to 32k words are addressable A0 remains low
Byte Order Select
0 MS byte placed on AD15 – AD8 and LS byte on AD7 – AD0 (32xxx 80x86)
1 MS byte placed on AD7 – AD0 and LS byte on AD15 – A8 (680x0)
Long Address Select
0 Dual 16-bit DMA mode
1 Single 32-bit DMA mode
high
Loopback Select
0 Loopback mode selected Bits D1 and D2 of the TCR must also be programmed for Loopback operation
1 Normal Operation
Auto-Initialize Remote
0 Send Command not executed all packets removed from Buffer Ring under program control
1 Send Command executed Remote DMA auto-initialized to remove packets from Buffer Ring
Note Send Command cannot be used with 680x0 byte processors
FIFO Threshold Select Encoded FIFO threshold Establishes point at which bus is requested when filling or
emptying the FIFO During reception the FIFO threshold indicates the number of bytes (or words) the FIFO has
filled serially from the network before bus request (BREQ) is asserted
Note FIFO threshold setting determines the DMA burst length
FT1
During transmission the FIFO threshold indicates the number of bytes (or words) the FIFO has filled from the
Local DMA before BREQ is asserted Thus the transmission threshold is 13 bytes minus the received
threshold
WTS establishes byte or word transfers for both Remote and Local DMA transfers
Ignored when WTS is low
When LAS is high the contents of the Remote DMA registers RSAR0 1 are issued as A16 – A31 Power up
0
0
1
1
Receive Thresholds
FT0
0
1
0
1
Word Wide
1 Word
2 Words
4 Words
6 Words
7
(Continued)
FT1
6
Byte Wide
12 Bytes
0EH (WRITE)
2 Bytes
4 Bytes
8 Bytes
FT0
5
ARM
4
29
LS
3
Description
LAS
2
BOS
1
WTS
0