peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 35

• Manufacturer Part Number: peb20534
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

Table 1
Pin No.
34
196
195
193
191
Data Sheet
Symbol
SERR
REQ
GNT
CLK
RST
PCI Bus Interface(DEMUX Interface) (cont’d)
Input (I)
Output (O)
o/d
t/s
t/s
I
I
Function
System Error
The DSCC4 asserts this signal to indicate a
fatal system error.
SERR is activated on the rising edge of CLK.
Request
Used by the DSCC4 to request control of the
PCI.
REQ is activated on the rising edge of CLK.
Grant
This signal is asserted by the arbiter to grant
control of the PCI to the DSCC4 in response to
a bus request via REQ. After GNT is asserted,
the DSCC4 will begin a bus transaction only
after the current bus Master has deasserted
the FRAME signal.
GNT is sampled on the rising edge of CLK.
Clock
Provides timing for all PCI transactions. Most
PCI signals are sampled or output driven
relative to the rising edge of CLK. The
maximum CLK frequency is 33 MHz.
Reset
An active RST signal brings all PCI registers,
sequencers and signals into a consistent
state.
RST also resets all other blocks beside PCI to
their initial state.
During RESET
- all PCI output signals are driven to their
benign state
- the TxDn (n=0,..,3) output signals are in high
impedance state
- the RTSn (n=0,..,3) output signals are
inactive
- all bi-directional signals are inputs.
35
Pin Descriptions
PEB 20534
PEF 20534
2000-05-30