peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 431

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peb20534

Manufacturer Part Number
peb20534
Description
Dma Supported Serial Communication Controller With 4 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet

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Table 128
No. Parameter
100 Clock
101 TxD to TxCLK delay (NRZ, NRZI encoding)
102 TxD to TxCLK delay (FM0, FM1, Manchester
103 TxD to TxCLK(out) delay (if TxCLKO is enabled)
104 CxD to TxCLK setup time,
105 CxD to TxCLK hold time,
106 RTS to TxCLK delay (not bus configuration mode)
Data Sheet
Transmit
data rates
period
encoding)
CTS to TxCLK setup time
CTS to TxCLK hold time
RTS to TxCLK delay (bus configuration mode)
Transmit Cycle Timing
externally clocked
(HDLC, high speed mode)
externally clocked
(non high speed)
internally clocked
(DPLL modes)
internally clocked
(non DPLL modes)
externally clocked
internally clocked
(DPLL modes)
internally clocked
(non DPLL modes)
431
min.
19.2
480
480
0
10
10
Electrical Characteristics
Limit Values
max.
52
10
2
2
35
35
5
35
35
PEB 20534
PEF 20534
2000-05-30
Unit
MBit/s
MBit/s
MBit/s
MBit/s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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