peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 53

• Manufacturer Part Number: peb20534
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

4.2
The DSCC4 may be configured for 33 MHz/32-bit De-multiplexed bus for connection to
non PCI systems with de-multiplexed processors such as the i960Hx or MC68EC0x0.
The de-multiplexed bus interface is a synchronous interface very similar to the PCI bus
with the following exceptions:
1. The W/R input/output signal replaces the function of the PCI command nibble in the
2. The transaction address is driven or read from the additional address bus A[31..2]
3. The parity signal PAR is not generated as a master or evaluated as a slave
Beside these exceptions all control signals and timings are equal to PCI bus interface
mode. Also the PCI Configuration Space must be programmed during configuration.
Note: In DEMUX mode as in PCI mode, the DSCC4 provides only the first address of a
Note: Because the PCI command nibble is replaced by a W/R control signal only IDSEL
Table 7
Pin
description
table
reference
Table 1
Table 4
Table 1
In DEMUX bus mode the burst capability is limited to 4-dwords and must be enabled via
the ’DBE’ (Demux Burst Enable) bit in the Global Mode Register GMODE.
Even in the case that burst capability has been enabled, the target can request the
DSCC4 to stop the current transaction by asserting the STOP signal as in PCI operation.
The following diagrams illustrate the functional timing waveforms for both single and
burst transactions.
Data Sheet
C/BE(3:0) bit field.
master burst read or write transaction. Address incrementation must be provided
externally if required by the target or DSCC4 burst capability is disabled (default
value) for DEMUX mode.
distinguishes between PCI Configuration Space and slave register access. Thus
IDSEL must be treated as a Configuration Space chipselect and remain
deasserted during all other slave register accesses.
De-multiplexed Bus Interface Extension
Non-PCI Signal Extension in the De-multiplexed Bus Interface Mode
Symbol
DEMUX
A(31:2)
W/R
Input (I)
Output (O)
I
I/O
I/O
Function
DEMUX = V
Interface mode.
De-multiplexed Address Bus
Write/Read Control signal
DEMUX = V
53
SS
DD3
Microprocessor Bus Interface
selects PCI mode,
selects De-multiplexed Bus
PEB 20534
PEF 20534
2000-05-30