hyb18t512160afl-3.7 Infineon Technologies Corporation, hyb18t512160afl-3.7 Datasheet - Page 108

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hyb18t512160afl-3.7

Manufacturer Part Number
hyb18t512160afl-3.7
Description
512-mbit Ddr2 Sdram
Manufacturer
Infineon Technologies Corporation
Datasheet
8.3.4
Setup (
defined as the Slew Rate between the last crossing of
V
t
the Slew Rate between the last crossing of
the first crossing of
always earlier than the nominal Slew Rate line between
shaded ‘
for derating value (see
is later than the nominal Slew Rate line anywhere
between shaded ‘
a tangent line to the actual signal from the ac level to dc
Figure 76
Data Sheet
DS
REF(dc)
) nominal Slew Rate for a falling signal is defined as
t
IS
and the first crossing of
V
&
REF(dc)
t
DS
Slew Rate Definition for Input and Data Setup and Hold Times
Slew Rate Definition Nominal
) nominal Slew Rate for a rising signal is
to ac region’, use nominal Slew Rate
V
REF(dc)
V
IL(ac).MAX
Figure
to ac region’, the Slew Rate of
. If the actual signal is
76). If the actual signal
V
IH(ac).MIN
. Setup (
V
REF(dc)
t
and
IS
&
109
level is used for derating value.(see
(
defined as the Slew Rate between the last crossing of
V
t
the Slew Rate between the last crossing of
and the first crossing of
always later than the nominal Slew Rate line between
shaded ‘dc to
derating value (see
earlier than the actual signal from the dc level to
level is used for derating value (see
t
DH
IH
IL(dc).MAX
HYB18T512[40/80/16]0AF(L)–[3/3S/3.7/5]
) nominal Slew Rate for a falling signal is defined as
&
t
DH
) nominal Slew Rate for a rising signal is
and the first crossing of
V
AC Timing Measurement Conditions
REF
region’, use nominal Slew Rate for
Figure
512-Mbit DDR2 SDRAM
V
REF(dc)
76). If the actual signal is
09112003-SDM9-IQ3P
. If the actual signal is
V
Figure
REF(dc)
Rev. 1.6, 2005-08
Figure
. Hold (
77)
V
77) Hold
IH(dc).MIN
t
V
IH
REF
&

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