tc58dvm92a1fti0 TOSHIBA Semiconductor CORPORATION, tc58dvm92a1fti0 Datasheet - Page 5
tc58dvm92a1fti0
Manufacturer Part Number
tc58dvm92a1fti0
Description
512-mbit 64m U 8 Bits Cmos Nand E2 Prom
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TC58DVM92A1FTI0.pdf
(44 pages)
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PROGRAMMING AND ERASING CHARACTERISTICS
(Ta
RY
Note: (1) CE High to Ready time depends on the pull-up resistor tied to the
t
t
t
N
t
(1): Refer to Application Note (12) toward the end of this document.
PROG
DBSY
MBPBSY
BERASE
/
SYMBOL
RE
CE
BY
- 40° to 85°C, V
(2) Sequential Read is terminated when t
(Refer to Application Note (9) toward the end of this document.)
is less than 30 ns,
Programming Time
Dummy Busy Time for Multi Block
Programming
Multi Block Program Busy Time
Number of Programming Cycles on Same
Page
Block Erasing Time
525
CC
PARAMETER
2.7 V to 3.6 V)
RY
526
/
BY
signal stays Ready.
527
CEH
is greater than or equal to 100 ns. If the RE to CE delay
A
MIN
t
CEH
Busy
t 100 ns
t
CRY
TYP.
200
200
2
2
A
: 0 to 30 ns o Busy signal is not output.
RY
MAX
1000
1000
10
10
*
3
/
TC58DVM92A1FTI0
BY
pin.
2003-07-11 5/44
* : V
UNIT
ms
P s
P s
P s
IH
or V
IL
NOTES
(1)
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