cxd3220r Sony Electronics, cxd3220r Datasheet - Page 38

• Manufacturer Part Number: cxd3220r
• Description: Ieee1394 Link/transaction Layer Controller Lsi For Sbp-2
• Manufacturer: Sony Electronics

Unformatted Transmit (Phy Configuration Packet) Fields
6-5-1-4. Unformatted Transmit (Phy Configuration Packet)
The data format for unformatted transmit during Phy Configuration packet transmit is shown below.
The first quadlet contains packet control information. The remaining quadlets contain data, and get on the bus
and are transmitted regardless of format. There is no CRC attached to the packet data.
Further, there is no CRC attached to the first quadlet.
Logical-inverse is not added at Link Core, so it must be added when transmitting.
Unformatted Transmit Format 1 (Phy Configuration Packet)
00
phy_ID
R
T
gap_cnt
Field Name
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
00
phy_ID
Indicates that the transmit packet is a Phy configuration packet.
Sets the force_root bit of the node with this Phy_ID sets to "1".
(Only valid when R is set to "1".)
Sets the force_root bit of the node with this Phy_ID to "1" when "1", and clears other
nodes' force_root bit. The Phy_ID area is ignored when "0".
Sets the value of the Phy_CONFIGURATION.gap_Count of the Phy register to the
value of gap_cnt when "1".
Indicates values of all node new Phy_CONFIGURATION.gap_Count.
These values are received immediately and stored in the register. It becomes valid
after the next bus reset.
R
T
logical inverse of 2nd quadlet data
gap_cnt
spd
– 38 –
0000
Description
0000
1
=1110
tCode
0000
priority
0000
0
CXD3220R