cxd3220r Sony Electronics, cxd3220r Datasheet - Page 57

• Manufacturer Part Number: cxd3220r
• Description: Ieee1394 Link/transaction Layer Controller Lsi For Sbp-2
• Manufacturer: Sony Electronics

CXD3220R
Transaction Control
In the case of data transmission (d = 1) when the ADP has been started, a Quadlet Write request packet (see
section 6-5-1-2) and Block Write request packet (see section 6-5-1-3), containing the address and Data Length
generated by the ADP, is automatically generated and sent to the initiator.
The initiator either returns Ack_complete for the Ack code or returns Ack_pending for the Ack code, after which
it sends back a Write response packet.
In the case of Ack_busy_ , retry is performed according to the value of BUSY_TIMEOUT field of the register.
When a response packet is not returned, a timeout is detected according to the value of the SPLIT_TIMEOUT
field of the register.
In the case of data reception (d = 0), a Quadlet Read request packet (see section 6-5-1-1), containing the
address and Data Length generated by the ADP, and Block Read request packet (see section 6-5-1-2) are
automatically generated and sent to the initiator.
The initiator returns Ack_pending for the Ack code and then sends back a Read response packet that contains
the data of the designated address.
In the case of Ack_busy_ , retry is performed according to the value of BUSY_TIMEOUT field of the register.
When a response packet is not returned, a timeout is detected according to the value of the SPLIT_TIMEOUT
field of the register.
The exchange for a single Transaction is performed in the manner described above. Data transfer of three
modes is performed in accordance with SBP-2 when exchange of this Transaction is continuous.
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