cxd3220r Sony Electronics, cxd3220r Datasheet - Page 47

• Manufacturer Part Number: cxd3220r
• Description: Ieee1394 Link/transaction Layer Controller Lsi For Sbp-2
• Manufacturer: Sony Electronics

7-3. Asynchronous Data Pipe (ADP)
Performance is an important factor for data transfer of computer peripherals. Although the Transaction Layer
has conventionally been controlled mainly with software, the CXD3220 realizes control with hardware. The
result is faster data transfer processing.
The CXD3220R contains a built-in circuit referred to as ADP that controls the 1394 Asynchronous Transaction
Layer in accordance with the IEEE1394 protocol. This ADP enables packet transfer to be performed
automatically via the 1394 serial bus in accordance with SBP-2 protocol.
Consequently, sequences based on the SBP-2 protocol such as ORB (operation request block) fetch, data
transfer, status transmission to the initiator and so forth can be simplified, enabling the use of the optimum
design when connecting the data of a disk drive, tape streamer or other computer peripherals to IEEE1394.
7-3-1. ADP Sequence (Data Transfer)
The following provides an explanation of those ADP functions relating to transmission based on the diagram
below.
As is defined in the SBP-2 protocol, data transfer with respect to transmission is initiated by a target.
Therefore, data transfer is performed in the form in which the target (this link IC) is written into initiator memory
using the 1394 Write Block Command for the initiator (e.g., host computer). The following illustrates a brief
overview of that sequence.
This is the role of the ADP with regard to transmission.
ADP Schematic Diagram
1) First, the CPU initializes the ADP register according to the contents of the ORB obtained.
2) Once the ADP has been initiated, the CXD3220 asserts the SDRQ and begins to request data from the
3) Data is then packetized in accordance with the SBP-2 data transfer format, and packet data to which the
4) When data equal to or greater than the size of one 1394 packet is read into the ADPTF, that data is sent
5) Once a bus has been acquired, the Block Write request containing the transport data is transmitted to the
6) After transmission, an Ack code for the Write request packet and, depending on the case, a Write
7) The tCode and Transaction Label of packets that are received by the Link Core are checked, and only the
8) The ADP writes the rCode of the received response packet into the register.
decoder. Data output from the decoder in synchronization with the SDRQ is input to the FIFO of the ADP
(ADPTF).
1394 Header has been added is automatically stored in the ADPTF. (A Block Write request is used for the
packets.)
to the 1394 Link Core. The Link Core then applies Arbitration to the 1394 bus (via Phy IC).
initiator.
response packet, are sent to the target from the initiator.
If this Ack code and Response code are normal, the ADP transmits the next data. In the case of an error,
the status is returned as an error and an Interrupt is generated to the CPU.
response packet returned to the ADP is input to the ADP. (This is not stored in the ADPRF.) Other packets
are input to the ARF.
ENDEC
Transfer Data from Media
1 LBA
1 LBA
ADPTF
ADP
Link Response
Link Request
SBP2 Packets
1394 Header
– 47 –
1394 Write Request
Packetize
according to SBP2
Core
Link
arbitration &
packet transmit
acknowledge
(or Write Response)
IEEE1394
Serial Bus
CXD3220R